Search results for "Michael J. Schulte"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Jacob Adriaens, Katherine Compton, Nam Sung Kim, Michael J. Schulte	The case for GPGPU spatial multitasking.	HPCA	2012	DBLP DOI BibTeX RDF
1	Samuel Tsen, Sonia Gonzalez-Navarro, Michael J. Schulte, Katherine Compton	Hardware Designs for Binary Integer Decimal-Based Rounding.	IEEE Trans. Computers	2011	DBLP DOI BibTeX RDF
1	Daniel W. Chang, Nam Sung Kim, Michael J. Schulte	Analyzing the performance and energy impact of 3D memory integration on embedded DSPs.	ICSAMOS	2011	DBLP DOI BibTeX RDF
1	Jungseob Lee, Vijay Sathisha, Michael J. Schulte, Katherine Compton, Nam Sung Kim	Improving Throughput of Power-Constrained GPUs Using Dynamic Voltage/Frequency and Core Scaling.	PACT	2011	DBLP DOI BibTeX RDF
1	Ahmet Akkas, Michael J. Schulte	A decimal floating-point fused multiply-add unit with a novel decimal leading-zero anticipator.	ASAP	2011	DBLP DOI BibTeX RDF
1	Syed Zohaib Gilani, Nam Sung Kim, Michael J. Schulte	Energy-efficient floating-point arithmetic for software-defined radio architectures.	ASAP	2011	DBLP DOI BibTeX RDF
1	Syed Zohaib Gilani, Nam Sung Kim, Michael J. Schulte	Scratchpad memory optimizations for digital signal processing applications.	DATE	2011	DBLP DOI BibTeX RDF
1	Liang-Kai Wang, Mark A. Erle, Charles Tsen, Eric M. Schwarz, Michael J. Schulte	A survey of hardware designs for decimal arithmetic.	IBM Journal of Research and Development	2010	DBLP DOI BibTeX RDF
1	Christipher D. Jenkins, Michael J. Schulte, John Glossner	Instruction set extensions for the advanced encryption standard on a multithreaded software defined radio platform.	IJHPSA	2010	DBLP DOI BibTeX RDF
1	Murugappan Senthilvelan, Javier Hormigo, Joon Hwa Chun, Mihai Sima, Daniel Iancu, Michael J. Schulte, John Glossner	CORDIC-based LMMSE equalizer for Software Defined Radio.	ICSAMOS	2010	DBLP DOI BibTeX RDF
1	Sao-Jie Chen, Pao-Ann Hsiung, Chu Yu, Mao-Hsu Yen, Sakir Sezer, Michael J. Schulte, Yu Hen Hu	ARAL-CR: An adaptive reasoning and learning cognitive radio platform.	ICSAMOS	2010	DBLP DOI BibTeX RDF
1	Daniel W. Chang, Christipher D. Jenkins, Philip C. Garcia, Syed Zohaib Gilani, Paula Aguilera, Aishwarya Nagarajan, Michael J. Anderson, Matthew A. Kenny, Sean M. Bauer, Michael J. Schulte, Katherine Compton	ERCBench: An Open-Source Benchmark Suite for Embedded and Reconfigurable Computing.	FPL	2010	DBLP DOI BibTeX RDF
1	Aishwarya Nagarajan, Michael J. Schulte, Parameswaran Ramanathan	Galois field hardware architectures for network coding.	ANCS	2010	DBLP DOI BibTeX RDF
1	Suman Mamidi, Emily R. Blem, Michael J. Schulte, John Glossner, Daniel Iancu, Andrei Iancu, Mayan Moudgill, Sanjay Jinturkar	Instruction set extensions for software defined radio.	Microprocessors and Microsystems - Embedded Hardware Design	2009	DBLP DOI BibTeX RDF
1	Liang-Kai Wang, Michael J. Schulte, John D. Thompson, Nandini Jairam	Hardware Designs for Decimal Floating-Point Addition and Related Operations.	IEEE Trans. Computers	2009	DBLP DOI BibTeX RDF
1	Dimitri Tan, Carl Lemonds, Michael J. Schulte	Low-Power Multiple-Precision Iterative Floating-Point Multiplier with SIMD Support.	IEEE Trans. Computers	2009	DBLP DOI BibTeX RDF
1	Mark A. Erle, Brian J. Hickmann, Michael J. Schulte	Decimal Floating-Point Multiplication.	IEEE Trans. Computers	2009	DBLP DOI BibTeX RDF
1	JoAnn M. Paul, Mwaffaq Otoom, Marc Somers, Sean M. Pieper, Michael J. Schulte	The Emerging Landscape of Computer Performance Evaluation.	Advances in Computers	2009	DBLP DOI BibTeX RDF
1	Walid A. Najjar, Michael J. Schulte (eds.)	Proceedings of the 2009 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (IC-SAMOS 2009), Samos, Greece, July 20-23, 2009	ICSAMOS	2009	DBLP BibTeX RDF
1	Charles Tsen, Sonia Gonzalez-Navarro, Michael J. Schulte, Brian J. Hickmann, Katherine Compton	A Combined Decimal and Binary Floating-Point Multiplier.	ASAP	2009	DBLP DOI BibTeX RDF
1	Anthony E. Gregerson, Amin Farmahini Farahani, Ben Buchli, Steve Naumov, Michail Bachtis, Katherine Compton, Michael J. Schulte, Wesley H. Smith, Sridhara Dasu	FPGA Design Analysis of the Clustering Algorithm for the CERN Large Hadron Collider.	FCCM	2009	DBLP DOI BibTeX RDF
1	Liang-Kai Wang, Michael J. Schulte	A Decimal Floating-Point Adder with Decoded Operands and a Decimal Leading-Zero Anticipator.	IEEE Symposium on Computer Arithmetic	2009	DBLP DOI BibTeX RDF
1	Michael J. Anderson, Chuck Tsen, Liang-Kai Wang, Katherine Compton, Michael J. Schulte	Performance analysis of decimal floating-point libraries and its impact on decimal hardware and software solutions.	ICCD	2009	DBLP DOI BibTeX RDF
1	John Glossner, Daniel Iancu, Mayan Moudgill, Sanjay Jinturkar, Gary Nacer, Stuart Stanley, Andrei Iancu, Hua Ye, Michael J. Schulte, Mihai Sima, Tomas Palenik, Peter Farkas, Jarmo Takala	Implementing communications systems on an SDR SoC.	ICASSP	2008	DBLP DOI BibTeX RDF
1	Brian J. Hickmann, Michael J. Schulte, Mark A. Erle	Improved combined binary/decimal fixed-point multipliers.	ICCD	2008	DBLP DOI BibTeX RDF
1	John Glossner, Daniel Iancu, Mayan Moudgill, Gary Nacer, Sanjay Jinturkar, Stuart Stanley, Michael J. Schulte	The Sandbridge SB3011 Platform.	EURASIP J. Emb. Sys.	2007	DBLP DOI BibTeX RDF
1	Sean M. Pieper, JoAnn M. Paul, Michael J. Schulte	A New Era of Performance Evaluation.	IEEE Computer	2007	DBLP DOI BibTeX RDF	scenario-oriented computing, computer performance evaluation
1	Liang-Kai Wang, Michael J. Schulte	A Decimal Floating-Point Divider Using Newton-Raphson Iteration.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	Newton-Raphson iteration, initial approximation, computer arithmetic, floating-point, division, hardware design, decimal
1	John Glossner, Daniel Iancu, Mayan Moudgill, Michael J. Schulte, Stamatis Vassiliadis	Trends in Low Power Handset Software Defined Radio.	SAMOS	2007	DBLP DOI BibTeX RDF	DSP, Software Defined Radio, SDR, Multithreaded processors
1	Charles Tsen, Michael J. Schulte, Sonia Gonzalez-Navarro	Hardware Design of a Binary Integer Decimal-based IEEE P754 Rounding Unit.	ASAP	2007	DBLP DOI BibTeX RDF
1	Suman Mamidi, Michael J. Schulte, Daniel Iancu, C. John Glossner	Architecture Support for Reconfigurable Multithreaded Processors in Programmable Communication Systems.	ASAP	2007	DBLP DOI BibTeX RDF
1	Liang-Kai Wang, Michael J. Schulte	Decimal Floating-Point Adder and Multifunction Unit with Injection-Based Rounding.	IEEE Symposium on Computer Arithmetic	2007	DBLP DOI BibTeX RDF
1	Mark A. Erle, Michael J. Schulte, Brian J. Hickmann	Decimal Floating-Point Multiplication Via Carry-Save Addition.	IEEE Symposium on Computer Arithmetic	2007	DBLP DOI BibTeX RDF
1	Mihai Sima, Murugappan Senthilvelan, Daniel Iancu, C. John Glossner, Mayan Moudgill, Michael J. Schulte	Software Solutions for Converting a MIMO-OFDM Channel into Multiple SISO-OFDM Channels.	WiMob	2007	DBLP DOI BibTeX RDF
1	Michael J. Schulte, Dimitri Tan, Carl Lemonds	Floating-point division algorithms for an x86 microprocessor with a rectangular multiplier.	ICCD	2007	DBLP DOI BibTeX RDF
1	Liang-Kai Wang, Charles Tsen, Michael J. Schulte, Divya Jhalani	Benchmarks and performance analysis of decimal floating-point applications.	ICCD	2007	DBLP DOI BibTeX RDF
1	Brian J. Hickmann, Andrew Krioukov, Michael J. Schulte, Mark A. Erle	A parallel IEEE P754 decimal floating-point multiplier.	ICCD	2007	DBLP DOI BibTeX RDF
1	Charles Tsen, Sonia Gonzalez-Navarro, Michael J. Schulte	Hardware design of a Binary Integer Decimal-based floating-point adder.	ICCD	2007	DBLP DOI BibTeX RDF
1	Philip Garcia, Katherine Compton, Michael J. Schulte, Emily R. Blem, Wenyin Fu	An Overview of Reconfigurable Hardware in Embedded Systems.	EURASIP J. Emb. Sys.	2006	DBLP DOI BibTeX RDF
1	Mustafa Gök, Michael J. Schulte, Mark G. Arnold	Integer Multipliers with Overflow Detection.	IEEE Trans. Computers	2006	DBLP DOI BibTeX RDF	high-speed arithmetic algorithms, overflow detection, Computer arithmetic, multiplication, combinational logic
1	Ahmet Akkas, Michael J. Schulte	Dual-mode floating-point multiplier architectures with parallel operations.	Journal of Systems Architecture	2006	DBLP DOI BibTeX RDF
1	Michael J. Schulte, John Glossner, Sanjay Jinturkar, Mayan Moudgill, Suman Mamidi, Stamatis Vassiliadis	A Low-Power Multithreaded Processor for Software Defined Radio.	VLSI Signal Processing	2006	DBLP DOI BibTeX RDF	low power, wireless communication, computer architecture, multithreading, microarchitecture, Software Defined Radio, processor design
1	Kent E. Wires, Michael J. Schulte	Reciprocal and Reciprocal Square Root Units with Operand Modification and Multiplication.	VLSI Signal Processing	2006	DBLP DOI BibTeX RDF	reciprocal square root, Newton-Raphson iteration, computer arithmetic, function approximation, table lookup, reciprocal
1	Robert D. Kenney, Michael J. Schulte	High-Speed Multioperand Decimal Adders.	IEEE Trans. Computers	2005	DBLP DOI BibTeX RDF	multioperand adders, Computer arithmetic, hardware designs, decimal arithmetic
1	Michael J. Schulte, Shuvra S. Bhattacharyya, Robert Schreiber	Guest Editorial.	VLSI Signal Processing	2005	DBLP DOI BibTeX RDF
1	C. John Glossner, Sean Dorward, Sanjay Jinturkar, Mayan Moudgill, Erdem Hokenek, Michael J. Schulte, Stamatis Vassiliadis	Sandbridge Software Tools.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Suman Mamidi, Daniel Iancu, Andrei Iancu, Michael J. Schulte, John Glossner	Instruction Set Extensions for Reed-Solomon Encoding and Decoding.	ASAP	2005	DBLP DOI BibTeX RDF
1	Liang-Kai Wang, Michael J. Schulte	Decimal Floating-Point Square Root Using Newton-Raphson Iteration.	ASAP	2005	DBLP DOI BibTeX RDF
1	Suman Mamidi, Emily R. Blem, Michael J. Schulte, C. John Glossner, Daniel Iancu, Andrei Iancu, Mayan Moudgill, Sanjay Jinturkar	Instruction set extensions for software defined radio on a multithreaded processor.	CASES	2005	DBLP DOI BibTeX RDF	convolutional encoding, multithreading, forward error correction, software defined radio, Reed-Solomon coding, instruction set extensions, digital signal processor, Viterbi decoding, turbo decoding
1	James E. Stine, Michael J. Schulte	A combined two's complement and floating-point comparator.	ISCAS	2005	DBLP DOI BibTeX RDF
1	E. George Walters III, Michael J. Schulte	Efficient Function Approximation Using Truncated Multipliers and Squarers.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
1	Mark A. Erle, Eric M. Schwarz, Michael J. Schulte	Decimal Multiplication with Efficient Partial Product Generation.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
1	C. John Glossner, Mayan Moudgill, Daniel Iancu, Gary Nacer, Sanjay Jinturkar, Stuart Stanley, Michael Samori, Tanuj Raja, Michael J. Schulte, Stamatis Vassiliadis	Future wireless convergence platforms.	CODES+ISSS	2005	DBLP DOI BibTeX RDF	wireless, software defined radio, digital signal processors
1	Ahmet Akkas, Michael J. Schulte, James E. Stine	Intrinsic Compiler Support for Interval Arithmetic.	Numerical Algorithms	2004	DBLP DOI BibTeX RDF
1	Michael J. Schulte, C. John Glossner, Suman Mamidi, Mayan Moudgill, Stamatis Vassiliadis	A Low-Power Multithreaded Processor for Baseband Communication Systems.	SAMOS	2004	DBLP DOI BibTeX RDF
1	Robert D. Kenney, Michael J. Schulte	Multioperand Decimal Addition.	ISVLSI	2004	DBLP DOI BibTeX RDF
1	Shankar Krithivasan, Michael J. Schulte, John Glossner	A Subword-Parallel Multiplication and Sum-of-Squares Unit.	ISVLSI	2004	DBLP DOI BibTeX RDF
1	John D. Thompson, Nandini Karra, Michael J. Schulte	A 64-bit Decimal Floating-Point Adder.	ISVLSI	2004	DBLP DOI BibTeX RDF
1	Kai Chirca, Michael J. Schulte, John Glossner, Haoran Wang, Suman Mamidi, Pablo I. Balzola, Stamatis Vassiliadis	A Static Low-Power, High-Performance 32-bit Carry Skip Adder.	DSD	2004	DBLP DOI BibTeX RDF
1	Liang-Kai Wang, Michael J. Schulte	Decimal Floating-Point Division Using Newton-Raphson Iteration.	ASAP	2004	DBLP DOI BibTeX RDF
1	Michael J. Schulte, Kai Chirca, John Glossner, Haoran Wang, Suman Mamidi, Pablo I. Balzola, Stamatis Vassiliadis	A Low-Power Carry Skip Adder with Fast Saturation.	ASAP	2004	DBLP DOI BibTeX RDF
1	Robert D. Kenney, Michael J. Schulte, Mark A. Erle	A High-Frequency Decimal Multiplier.	ICCD	2004	DBLP DOI BibTeX RDF
1	Ahmet Akkas, Michael J. Schulte	A Quadruple Precision and Dual Double Precision Floating-Point Multiplier.	DSD	2003	DBLP DOI BibTeX RDF	Quadruple precision, computer arithmetic, normalization, floating-point, multiplier, rounding, double precision
1	Michael J. Schulte, Louis Marquette, Shankar Krithivasan, E. George Walters III, John Glossner	Combined Multiplication and Sum-of-Squares Units.	ASAP	2003	DBLP DOI BibTeX RDF
1	Mark A. Erle, Michael J. Schulte	Decimal Multiplication Via Carry-Save Addition.	ASAP	2003	DBLP DOI BibTeX RDF
1	Mark G. Arnold, Jesus Garcia, Michael J. Schulte	The Interval Logarithmic Number System.	IEEE Symposium on Computer Arithmetic	2003	DBLP DOI BibTeX RDF
1	Michael J. Schulte, Graham A. Jullien	Guest Editorial.	VLSI Signal Processing	2002	DBLP DOI BibTeX RDF
1	C. John Glossner, Michael J. Schulte, Stamatis Vassiliadis	A Java-Enabled DSP.	Embedded Processor Design Challenges	2002	DBLP DOI BibTeX RDF
1	Kent E. Wires, Michael J. Schulte, Don McCarley	FPGA Resource Reduction Through Truncated Multiplication.	FPL	2001	DBLP DOI BibTeX RDF
1	K'Andrea C. Bickerstaff, Earl E. Swartzlander Jr., Michael J. Schulte	Analysis of Column Compression Multipliers.	IEEE Symposium on Computer Arithmetic	2001	DBLP DOI BibTeX RDF
1	Kent E. Wires, Michael J. Schulte, James E. Stine	Combined IEEE Compliant and Truncated Floating Point Multipliers for Reduced Power Dissipation.	ICCD	2001	DBLP BibTeX RDF
1	Pablo I. Balzola, Michael J. Schulte, Jie Ruan, C. John Glossner, Erdem Hokenek	Design Alternatives for Parallel Saturating Multioperand Adders.	ICCD	2001	DBLP BibTeX RDF
1	Michael J. Schulte, Pablo I. Balzola, Ahmet Akkas, Robert W. Brocato	Integer Multiplication with Overflow Detection or Saturation.	IEEE Trans. Computers	2000	DBLP DOI BibTeX RDF	unsigned, tree multipliers, computer arithmetic, array multipliers, Overflow, saturation, integer, two's complement
1	Michael J. Schulte, Earl E. Swartzlander Jr.	A Family of Variable-Precision Interval Arithmetic Processors.	IEEE Trans. Computers	2000	DBLP DOI BibTeX RDF	variable-precision arithmetic, computer arithmetic, accuracy, Processors, interval arithmetic, hardware designs, roundoff error
1	Javier Hormigo, Julio Villalba, Michael J. Schulte	A Hardware Algorithm for Variable-Precision Logarithm.	ASAP	2000	DBLP DOI BibTeX RDF	Computer arithmetic, error analysis, logarithm, variable-precision
1	Michael J. Schulte, Pablo I. Balzola, Jie Ruan, C. John Glossner	Parallel saturating multioperand adders.	CASES	2000	DBLP DOI BibTeX RDF
1	Dean Batten, Sanjay Jinturkar, C. John Glossner, Michael J. Schulte, Paul D'Arcy	A New Approach to DSP Intrinsic Functions. (PDF / PS)	HICSS	2000	DBLP DOI BibTeX RDF	Speech coders, intrinsic functions, profile-directed function inlining, performance analysis, instruction-level parallelism, software pipelining, speedup, modulo scheduling, loop optimization, code growth
1	Michael J. Schulte, Vitaly Zelov, Ahmet Akkas, James Craig Burley	The Interval-Enhanced GNU Fortran Compiler.	Reliable Computing	1999	DBLP DOI BibTeX RDF
1	Michael J. Schulte, James E. Stine	Approximating Elementary Functions with Symmetric Bipartite Tables.	IEEE Trans. Computers	1999	DBLP DOI BibTeX RDF	bipartite tables, approximations, table lookups, Elementary functions
1	James E. Stine, Michael J. Schulte	The Symmetric Table Addition Method for Accurate Function Approximation.	VLSI Signal Processing	1999	DBLP DOI BibTeX RDF
1	Navindra Yadav, Michael J. Schulte, John Glossner	Parallel Saturating Fractional Arithmetic Units.	Great Lakes Symposium on VLSI	1999	DBLP DOI BibTeX RDF
1	Michael J. Schulte, Kent E. Wires	High-Speed Inverse Square Roots.	IEEE Symposium on Computer Arithmetic	1999	DBLP DOI BibTeX RDF	inverse square roots, truncated multiplication, squaring units, computer arithmetic, error analysis, VLSI design, Function approximation
1	James E. Stine, Michael J. Schulte	A Combined Interval and Floating Point Multiplier.	Great Lakes Symposium on VLSI	1998	DBLP DOI BibTeX RDF	computer arithmetic, accuracy, multiplication, floating point, hardware design, rounding, Interval, double precision
1	Michael J. Schulte, James E. Stine	Accurate Function Approximations by Symmetric Table Lookup and Addition.	ASAP	1997	DBLP DOI BibTeX RDF	multi-operand addition, approximations, computer arithmetic, hardware, error analysis, floating point, table lookup, Elementary functions, Taylor series, symmetric
1	Michael J. Schulte, James E. Stine	Symmetric Bipartite Tables for Accurate Function Approximation.	IEEE Symposium on Computer Arithmetic	1997	DBLP DOI BibTeX RDF	approximations, computer arithmetic, error analysis, table lookup, Elementary functions, Taylor series, symmetric, bipartite, Booth encoding, accurate
1	Michael J. Schulte	Hardware interval multipliers.	RITA	1996	DBLP BibTeX RDF
1	Thomas Lynch, Michael J. Schulte	Software for high radix on-line arithmetic.	Reliable Computing	1996	DBLP DOI BibTeX RDF
1	Michael J. Schulte, Earl E. Swartzlander Jr.	Variable-precision, interval arithmetic coprocessors.	Reliable Computing	1996	DBLP DOI BibTeX RDF
1	Thomas Lynch, Michael J. Schulte	A High Radix On-Line Arithmetic for Credible and Accurate Computing.	J. UCS	1995	DBLP BibTeX RDF
1	K'Andrea C. Bickerstaff, Michael J. Schulte, Earl E. Swartzlander Jr.	Parallel reduced area multipliers.	VLSI Signal Processing	1995	DBLP DOI BibTeX RDF
1	Michael J. Schulte, Earl E. Swartzlander Jr.	A Processor for Staggered Interval Arithmetic.	ASAP	1995	DBLP DOI BibTeX RDF	computer arithmetic, hardware, processor, Interval arithmetic, precision, application specific, numerical computations
1	Michael J. Schulte, Earl E. Swartzlander Jr.	Hardware Design and Arithmetic Algorithms for a Variable-Precision, Interval Arithmetic Coprocessor.	IEEE Symposium on Computer Arithmetic	1995	DBLP DOI BibTeX RDF	arithmetic algorithms, computer arithmetic, hardware, Interval arithmetic, precision, coprocessor, numerical computations
1	Thomas Lynch, Ashraf Ahmed, Michael J. Schulte, Thomas K. Callaway, Robert Tisdale	The K5 transcendental functions.	IEEE Symposium on Computer Arithmetic	1995	DBLP DOI BibTeX RDF	K5 transcendental functions, AMD x86 compatible superscalar microprocessor, multi-level development cycle, design schedule, table-driven reductions, multiprecision arithmetic operations, encoding, polynomials, floating point arithmetic, microprocessor chips, approximation theory, polynomial approximations
1	Michael J. Schulte, Earl E. Swartzlander Jr.	A coprocessor for accurate and reliable numerical computations. (PDF / PS)	ICCD	1995	DBLP DOI BibTeX RDF	reliable numerical computations, direct hardware support, logic design, digital arithmetic, interval arithmetic, hardware design, coprocessors, coprocessor, numerical computations
1	Michael J. Schulte, J. Omar, Earl E. Swartzlander Jr.	Optimal initial approximations for the Newton-Raphson division algorithm.	Computing	1994	DBLP DOI BibTeX RDF
1	Michael J. Schulte, Earl E. Swartzlander Jr.	Hardware Designs for Exactly Rounded Elemantary Functions.	IEEE Trans. Computers	1994	DBLP DOI BibTeX RDF	Chebyshev approximation, summing circuits, exactly rounded elementary functions, multi-operand adder, Chebyshev series approximation, single-precision floating point numbers, chip area, 1.0-micron CMOS technology, computational delay, exact rounding, argument reduction, computer arithmetic, digital arithmetic, polynomials, CMOS integrated circuits, multiplying circuits, square-root, hardware designs, reciprocal, approximation theory, polynomial approximation, special-purpose hardware, parallel multiplier, 1 micron
1	Michael J. Schulte, Earl E. Swartzlander Jr.	Exact rounding of certain elementary functions.	IEEE Symposium on Computer Arithmetic	1993	DBLP DOI BibTeX RDF

Publications of "Michael J. Schulte" ( http://dblp.L3S.de/Authors/Michael_J._Schulte )