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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 6 occurrences of 5 keywords
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Results
Found 10 publication records. Showing 10 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Michail Maniatakos, Naghmeh Karimi, Chandra Tirumurti, Abhijit Jas, Yiorgos Makris |
Instruction-Level Impact Analysis of Low-Level Faults in a Modern Microprocessor Controller.  |
IEEE Trans. Computers  |
2011 |
DBLP DOI BibTeX RDF |
instruction-level error, microprocessor controller, Fault simulation, concurrent error detection |
| 1 | Naghmeh Karimi, Michail Maniatakos, Abhijit Jas, Chandra Tirumurti, Yiorgos Makris |
Workload-Cognizant Concurrent Error Detection in the Scheduler of a Modern Microprocessor. |
IEEE Trans. Computers |
2011 |
DBLP DOI BibTeX RDF |
scheduler, microprocessor, invariance, Concurrent error detection |
| 1 | Michail Maniatakos, Chandra Tirumurti, Abhijit Jas, Yiorgos Makris |
AVF Analysis Acceleration via Hierarchical Fault Pruning. |
European Test Symposium |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Michail Maniatakos, Yiorgos Makris, Prabhakar Kudva, Bruce M. Fleischer |
Exponent monitoring for low-cost concurrent error detection in FPU control logic. |
VTS |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Michail Maniatakos, Yiorgos Makris |
Workload-driven selective hardening of control state elements in modern microprocessors. |
VTS |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Michail Maniatakos, Naghmeh Karimi, Chandra Tirumurti, Abhijit Jas, Yiorgos Makris |
Instruction-Level Impact Comparison of RT- vs. Gate-Level Faults in a Modern Microprocessor Controller. |
VTS |
2009 |
DBLP DOI BibTeX RDF |
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| 1 | Naghmeh Karimi, Michail Maniatakos, Chandra Tirumurti, Abhijit Jas, Yiorgos Makris |
Impact analysis of performance faults in modern microprocessors. |
ICCD |
2009 |
DBLP DOI BibTeX RDF |
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| 1 | Naghmeh Karimi, Michail Maniatakos, Abhijit Jas, Yiorgos Makris |
On the Correlation between Controller Faults and Instruction-Level Errors in Modern Microprocessors. |
ITC |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Michail Maniatakos, Songhua Xu, Willard L. Miranker |
Constraint-Based Placement and Routing for FPGAs Using Self-Organizing Maps. |
ICTAI |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Michail Maniatakos, Naghmeh Karimi, Yiorgos Makris, Abhijit Jas, Chandra Tirumurti |
Design and Evaluation of a Timestamp-Based Concurrent Error Detection Method (CED) in a Modern Microprocessor Controller. |
DFT |
2008 |
DBLP DOI BibTeX RDF |
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