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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 4 occurrences of 4 keywords
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Results
Found 18 publication records. Showing 18 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Gonzalo Carvajal, Miguel Figueroa, Daniel Sbarbaro, Waldo Valenzuela |
Analysis and Compensation of the Effects of Analog VLSI Arithmetic on the LMS Algorithm.  |
IEEE Transactions on Neural Networks  |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Pablo Pizarro, Miguel Figueroa |
Subspace-Based Face Recognition on an FPGA.  |
EANN/AIAI  |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Rodolfo Redlich, Gonzalo Carvajal, Miguel Figueroa |
An FPGA-based real-time nonuniformity correction system for Infrared Focal Plane Arrays.  |
ASAP  |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Lech Józwiak, Nadia Nedjah, Miguel Figueroa |
Modern development methods and tools for embedded reconfigurable systems: A survey.  |
Integration  |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Barend van Liempd, Daniel Herrera, Miguel Figueroa |
An FPGA-Based Accelerator for Analog VLSI Artificial Neural Network Emulation.  |
DSD  |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Gonzalo Carvajal, Waldo Valenzuela, Miguel Figueroa |
Image Recognition in Analog VLSI with On-Chip Learning.  |
ICANN  |
2009 |
DBLP DOI BibTeX RDF |
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| 1 | Ricardo Escalona, Daniel Herrera, Miguel Figueroa |
A Reconfigurable Array for Blind Source-separation on an FPGA.  |
BIODEVICES  |
2009 |
DBLP BibTeX RDF |
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| 1 | Waldo Valenzuela, Gonzalo Carvajal, Miguel Figueroa |
Blind Source-Separation in Mixed-Signal VLSI Using the InfoMax Algorithm.  |
ICANN  |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Gonzalo Carvajal, Waldo Valenzuela, Miguel Figueroa |
Subspace-Based Face Recognition in Analog VLSI.  |
NIPS  |
2007 |
DBLP BibTeX RDF |
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| 1 | Miguel Figueroa, Esteban Matamala, Gonzalo Carvajal, Seth Bridges |
Adaptive Signal Processing in Mixed-Signal VLSI with Anti-Hebbian Learning.  |
ISVLSI  |
2006 |
DBLP DOI BibTeX RDF |
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| 1 | Gonzalo Carvajal, Miguel Figueroa, Seth Bridges |
Effects of Analog-VLSI Hardware on the Performance of the LMS Algorithm.  |
ICANN  |
2006 |
DBLP DOI BibTeX RDF |
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| 1 | Miguel Figueroa, Seth Bridges, Chris Diorio |
On-Chip Compensation of Device-Mismatch Effects in Analog VLSI Neural Networks.  |
NIPS ![In: Advances in Neural Information Processing Systems 17 [Neural Information Processing Systems, NIPS 2004, December 13-18, 2004, Vancouver, British Columbia, Canada], 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP BibTeX RDF |
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| 1 | David Hsu, Miguel Figueroa, Chris Diorio |
Competitive learning with floating-gate circuits.  |
IEEE Transactions on Neural Networks  |
2002 |
DBLP DOI BibTeX RDF |
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| 1 | Seth Bridges, Miguel Figueroa, David Hsu, Chris Diorio |
Field-Programmable Learning Arrays.  |
NIPS ![In: Advances in Neural Information Processing Systems 15 [Neural Information Processing Systems, NIPS 2002, December 9-14, 2002, Vancouver, British Columbia, Canada], pp. 1155-1162, 2002, MIT Press, 0-262-02550-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP BibTeX RDF |
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| 1 | David Hsu, Seth Bridges, Miguel Figueroa, Chris Diorio |
Adaptive Quantization and Density Estimation in Silicon.  |
NIPS ![In: Advances in Neural Information Processing Systems 15 [Neural Information Processing Systems, NIPS 2002, December 9-14, 2002, Vancouver, British Columbia, Canada], pp. 1083-1090, 2002, MIT Press, 0-262-02550-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP BibTeX RDF |
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| 1 | Tim Tuan, Miguel Figueroa, Frank Lind, Chucai Zhou, Chris Diorio, John Sahr |
An FPGA-Based Array Processor for an Ionospheric-Imaging Radar.  |
FCCM  |
2000 |
DBLP DOI BibTeX RDF |
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| 1 | David Hsu, Miguel Figueroa, Chris Diorio |
A Silicon Primitive for Competitive Learning.  |
NIPS  |
2000 |
DBLP BibTeX RDF |
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| 1 | Darren C. Cronquist, Chris Fisher, Miguel Figueroa, Paul Franklin, Carl Ebeling |
Architecture Design of Reconfigurable Pipelined Datapaths.  |
ARVLSI  |
1999 |
DBLP DOI BibTeX RDF |
High-speed computation, Pipelining, Signal processing, Reconfigurable architectures, Configurable computing |
Displaying result #1 - #18 of 18 (100 per page; Change: )
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