Search results for "Miguel Miranda"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Pavel Poliakov, Pieter Blomme, Alessandro Vaglio Pret, Miguel Corbalan Miranda, Roel Gronheid, Diederik Verkest, Jan Van Houdt, Wim Dehaene	Trades-off between lithography line edge roughness and error-correcting codes requirements for NAND Flash memories.	Microelectronics Reliability	2012	DBLP DOI BibTeX RDF
1	Pavel Poliakov, Pieter Blomme, Miguel Corbalan, Jan Van Houdt, Wim Dehaene	Cross-cell interference variability aware model of fully planar NAND Flash memory including line edge roughness.	Microelectronics Reliability	2011	DBLP DOI BibTeX RDF
1	Ramon Canal, Antonio Rubio, A. Asenov, A. Brown, Miguel Miranda, Paul Zuber, Antonio González, Xavier Vera	TRAMS Project: Variability and Reliability of SRAM Memories in sub-22 nm Bulk-CMOS Technologies.	Procedia CS	2011	DBLP DOI BibTeX RDF
1	Lucas Brusamarello, Gilson I. Wirth, Philippe Roussel, Miguel Miranda	Fast and accurate statistical characterization of standard cell libraries.	Microelectronics Reliability	2011	DBLP DOI BibTeX RDF
1	Miguel Miranda, José Machado, António Abelha, José Neves, João Neves	Evolutionary Intelligence in Agent Modeling and Interoperability.	ISAmI	2011	DBLP DOI BibTeX RDF
1	Miguel Miranda, Philippe Roussel, Lucas Brusamarello, Gilson I. Wirth	Statistical characterization of standard cells using design of experiments with response surface modeling.	DAC	2011	DBLP DOI BibTeX RDF
1	Miguel Miranda, Paul Zuber, Petr Dobrovolný, Philippe Roussel	Variability aware modeling for yield enhancement of SRAM and logic.	DATE	2011	DBLP BibTeX RDF
1	Nivard Aymerich, A. Asenov, A. Brown, Ramon Canal, B. Cheng, Joan Figueras, Antonio González, Enric Herrero, S. Markov, Miguel Miranda, P. Pouyan, Tanausu Ramirez, Antonio Rubio, I. Vatajelu, Xavier Vera, X. Wang, Paul Zuber	New reliability mechanisms in memory design for sub-22nm technologies.	IOLTS	2011	DBLP DOI BibTeX RDF
1	Pavel Poliakov, Ankur Anchlia, Marie Garcia Bardon, Bram Rooseleer, Bart De Wachter, Nadine Collaert, Koen van der Zanden, Wim Dehaene, Diederik Verkest, Miguel Corbalan Miranda	Circuit Design for Bias Compatibility in Novel FinFET-Based Floating-Body RAM.	IEEE Trans. on Circuits and Systems	2010	DBLP DOI BibTeX RDF
1	Miguel Miranda, Gabriel Pontes, Pedro Gonçalves, Hugo Peixoto, Manuel Santos, António Abelha, José Machado	Modelling Intelligent Behaviours in Multi-agent Based HL7 Services.	Computer and Information Science	2010	DBLP DOI BibTeX RDF
1	Paul Zuber, Petr Dobrovolný, Miguel Miranda	A holistic approach for statistical SRAM analysis.	DAC	2010	DBLP DOI BibTeX RDF	statistical SRAM analysis, process variability, yield prediction
1	Paul Zuber, Miguel Miranda, Petr Dobrovolný, Koen van der Zanden, Jong-Hoon Jung	Statistical SRAM analysis for yield enhancement.	DATE	2010	DBLP BibTeX RDF
1	José Machado, Miguel Miranda, Gabriel Pontes, António Abelha, José Neves	Morality in Group Decision Support Systems in Medicine.	IDC	2010	DBLP DOI BibTeX RDF
1	Ahmed Mohamed AbdelHamid, Ankur Anchlia, Stylianos Mamagkakis, Miguel Corbalan Miranda, Bart Dierickx, Maarten Kuijk	A Standardized Knobs and Monitors RTL2RTL Insertion Methodology for Fine Grain SoC Tuning.	DSD	2009	DBLP DOI BibTeX RDF
1	Hua Wang, Miguel Miranda, Wim Dehaene, Francky Catthoor	Design and Synthesis of Pareto Buffers Offering Large Range Runtime Energy/Delay Tradeoffs Via Combined Buffer Size and Supply Voltage Tuning.	IEEE Trans. VLSI Syst.	2009	DBLP DOI BibTeX RDF
1	Miguel Miranda, Bart Dierickx, Paul Zuber, P. Dobrovoln, F. Kutscherauer, Philippe Roussel, Pavel Poliakov	Variability aware modeling of SoCs: From device variations to manufactured system yield.	ISQED	2009	DBLP DOI BibTeX RDF
1	Paul Zuber, Vladimir Matvejev, Philippe Roussel, Petr Dobrovolný, Miguel Miranda	Exponent Monte Carlo for Quick Statistical Circuit Simulation.	PATMOS	2009	DBLP DOI BibTeX RDF
1	Concepción Sanz, Manuel Prieto, José Ignacio Gómez, Antonis Papanikolaou, Miguel Miranda, Francky Catthoor	Combining system scenarios and configurable memories to tolerate unpredictability.	ACM Trans. Design Autom. Electr. Syst.	2008	DBLP DOI BibTeX RDF	variability compensation, Process variation, parametric yield
1	Hua Wang, Francky Catthoor, Miguel Miranda, Wim Dehaene	Synthesis of Runtime Switchable Pareto Buffers Offering Full Range Fine Grained Energy/Delay Trade-Offs.	Signal Processing Systems	2008	DBLP DOI BibTeX RDF	CMOS buffer, Low power design, Trade-offs
1	Ilya Issenin, Erik Brockmeyer, Miguel Miranda, Nikil Dutt	DRDU: A data reuse analysis technique for efficient scratch-pad memory management.	ACM Trans. Design Autom. Electr. Syst.	2007	DBLP DOI BibTeX RDF	Scratch-pad memory management, data reuse analysis, memory hierarchy, compiler analysis
1	Antonis Papanikolaou, Hua Wang, Miguel Miranda, Francky Catthoor	Reliability issues in deep deep sub-micron technologies: time-dependent variability and its impact on embedded system design.	IOLTS	2007	DBLP DOI BibTeX RDF
1	Concepción Sanz, Manuel Prieto, Antonis Papanikolaou, Miguel Miranda, Francky Catthoor	System-level process variability compensation on memory organizations of dynamic applications: a case study.	ISQED	2006	DBLP DOI BibTeX RDF
1	Antonis Papanikolaou, Miguel Miranda, Hua Wang, Francky Catthoor, M. Satyakiran, Pol Marchal, Ben Kaczer, C. Bruynseraede, Zsolt Tokei	Reliability issues in deep deep sub-micron technologies: time-dependent variability and its impact on embedded system design.	VLSI-SoC	2006	DBLP DOI BibTeX RDF
1	Hua Wang, Miguel Miranda, Francky Catthoor, Wim Dehaene	On the Combined Impact of Soft and Medium Gate Oxide Breakdown and Process Variability on the Parametric Figures of SRAM components.	MTDT	2006	DBLP DOI BibTeX RDF
1	Antonis Papanikolaou, T. Grabner, Miguel Miranda, Philippe Roussel, Francky Catthoor	Yield prediction for architecture exploration in nanometer technology nodes: : a model and case study for memory organizations.	CODES+ISSS	2006	DBLP DOI BibTeX RDF	system exploration, process variability, parametric yield
1	Chidamber Kulkarni, C. Ghez, Miguel Miranda, Francky Catthoor, Hugo De Man	Cache Conscious Data Layout Organization for Conflict Miss Reduction in Embedded Multimedia Applications.	IEEE Trans. Computers	2005	DBLP DOI BibTeX RDF	RISC/CISC, VLIW architectures, VLSI systems
1	Hua Wang, Miguel Miranda, Antonis Papanikolaou, Francky Catthoor, Wim Dehaene	Variable tapered pareto buffer design and implementation allowing run-time configuration for low-power embedded SRAMs.	IEEE Trans. VLSI Syst.	2005	DBLP DOI BibTeX RDF
1	Hua Wang, Miguel Miranda, Wim Dehaene, Francky Catthoor, Karen Maex	Systematic Analysis of Energy and Delay Impact of Very Deep Submicron Process Variability Effects in Embedded SRAM Modules.	DATE	2005	DBLP DOI BibTeX RDF
1	Miguel Miranda, Soonhoi Ha (eds.)	Proceedings of the 2005 3rd Workshop on Embedded Systems for Real-Time Multimedia, ESTImedia 2005, September 22-23, 2005, New York Metropolitan Area, USA	ESTImedia	2005	DBLP BibTeX RDF
1	Antonis Papanikolaou, F. Lobmaier, Hua Wang, Miguel Miranda, Francky Catthoor	A system-level methodology for fully compensating process variability impact of memory organizations in periodic applications.	CODES+ISSS	2005	DBLP DOI BibTeX RDF	system-level compensation, process variability, parametric yield
1	Antonis Papanikolaou, Miguel Miranda, Francky Catthoor	Overcoming the "Memory Wall" by improved system design exploration and a link to process technology options.	Conf. Computing Frontiers	2004	DBLP DOI BibTeX RDF	combined system design and process technology exploration, optimal energy/delay trade-off exploration in memories
1	Hua Wang, Antonis Papanikolaou, Miguel Miranda, Francky Catthoor	A global bus power optimization methodology for physical design of memory dominated systems by coupling bus segmentation and activity driven block placement.	ASP-DAC	2004	DBLP DOI BibTeX RDF
1	Ilya Issenin, Erik Brockmeyer, Miguel Miranda, Nikil Dutt	Data Reuse Analysis Technique for Software-Controlled Memory Hierarchies.	DATE	2004	DBLP DOI BibTeX RDF
1	Miguel Miranda, Radu Marculescu (eds.)	Proceedings of the 2002 2nd Workshop on Embedded Systems for Real-Time Multimedia, ESTImedia 2004, September 6-7, Stockholm, Sweden	ESTImedia	2004	DBLP BibTeX RDF
1	Antonis Papanikolaou, Miguel Miranda, Francky Catthoor, Henk Corporaal, Hugo De Man, David De Roest, Michele Stucchi, Karen Maex	Global interconnect trade-off for technology over memory modules to application level: case study.	SLIP	2003	DBLP DOI BibTeX RDF	Pareto-optimal energy/delay interconnect exploration, interconnect wire processing, intra/inter-memory interconnect
1	Erik Brockmeyer, Miguel Miranda, Henk Corporaal, Francky Catthoor	Layer Assignment echniques for Low Energy in Multi-Layered Memory Organisations.	DATE	2003	DBLP DOI BibTeX RDF
1	Pieter Op de Beeck, C. Ghez, Erik Brockmeyer, Miguel Miranda, Francky Catthoor, Geert Deconinck	Background Data Organisation for the Low-Power Implementation in Real-Time of a Digital Audio Broadcast Receiver on a SIMD Processor.	DATE	2003	DBLP DOI BibTeX RDF
1	Antonis Papanikolaou, Miguel Miranda, Francky Catthoor, Henk Corporaal, Hugo De Man, David De Roest, Michele Stucchi, Karen Maex	Interconnect exploration for future wire dominated technologies.	SLIP	2002	DBLP DOI BibTeX RDF	interconnect wire processing, intra/inter-memory interconnect, pareto-optimal energy/delay interconnect exploration
1	Martin Palkovic, Miguel Miranda, Kristof Denolf, Peter Vos, Francky Catthoor	Systematic Address and Control Code Transformations for Performance Optimisation of a MPEG-4 Video Decoder.	VLSI Design	2002	DBLP DOI BibTeX RDF
1	Martin Palkovic, Miguel Miranda, Francky Catthoor	Systematic Power-Performance Trade-Off in MPEG-4 by Means of Selective Function Inlining Steered by Address Optimization Opportunities.	DATE	2002	DBLP DOI BibTeX RDF
1	Peeter Ellervee, Miguel Miranda, Francky Catthoor, Ahmed Hemani	System-level data-format exploration for dynamically allocated datastructures.	IEEE Trans. on CAD of Integrated Circuits and Systems	2001	DBLP DOI BibTeX RDF
1	Miguel Miranda, C. Ghez, Chidamber Kulkarni, Francky Catthoor, Diederik Verkest	Systematic speed-power memory data-layout exploration for cache controlled embedded multimedia applications.	ISSS	2001	DBLP BibTeX RDF
1	Chidamber Kulkarni, C. Ghez, Miguel Miranda, Francky Catthoor, Hugo De Man	Cache conscious data layout organization for embedded multimedia applications.	DATE	2001	DBLP DOI BibTeX RDF
1	Peeter Ellervee, Miguel Miranda, Francky Catthoor, Ahmed Hemani	System-level data format exploration for dynamically allocated data structures.	DAC	2000	DBLP DOI BibTeX RDF
1	Sumit Gupta, Rajesh K. Gupta, Miguel Miranda, Francky Catthoor	Analysis of High-Level Address Code Transformations for Programmable Processors.	DATE	2000	DBLP DOI BibTeX RDF
1	Diederik Verkest, Julio Leao da Silva Jr., Chantal Ykman-Couvreur, Kris Croes, Miguel Miranda, Sven Wuytack, Francky Catthoor, Gjalt G. de Jong, Hugo De Man	Matisse: A System-on-Chip Design Methodology Emphasizing Dynamic Memory Management.	VLSI Signal Processing	1999	DBLP DOI BibTeX RDF
1	Arnout Vandecappelle, Miguel Miranda, Erik Brockmeyer, Francky Catthoor, Diederik Verkest	Global Multimedia System Design Exploration Using Accurate Memory Organization Feedback.	DAC	1999	DBLP DOI BibTeX RDF
1	Peeter Ellervee, Ahmed Hemani, Miguel Miranda, Francky Catthoor	Exploiting Data Transfer Locality in Memory Mapping.	EUROMICRO	1999	DBLP DOI BibTeX RDF
1	Miguel Miranda, Francky Catthoor, Martin Janssen, Hugo De Man	High-level address optimization and synthesis techniques for data-transfer-intensive applications.	IEEE Trans. VLSI Syst.	1998	DBLP DOI BibTeX RDF
1	Julio Leao da Silva Jr., Chantal Ykman-Couvreur, Miguel Miranda, Kris Croes, Sven Wuytack, Gjalt G. de Jong, Francky Catthoor, Diederik Verkest, Paul Six, Hugo De Man	Efficient System Exploration and Synthesis of Applications with Dynamic Data Storage and Intensive Data Transfer.	DAC	1998	DBLP DOI BibTeX RDF	technology mapping, programmable logic devices, PLA-style logic blocks
1	Miguel Miranda, M. Kaspar, Francky Catthoor, Hugo De Man	Architectural exploration and optimization for counter based hardware address generation.	ED&amp;TC	1997	DBLP DOI BibTeX RDF
1	Miguel Miranda, Francky Catthoor, Martin Janssen, Hugo De Man	ADOPT: Efficient Hardware Address Generation in Distributed Memory Architectures. (PDF / PS)	ISSS	1996	DBLP DOI BibTeX RDF
1	M. J. Aguado, E. de la Torre, Miguel Miranda, Carlos A. López-Barrio	Distributed Implementation of an ATPG System Using Dynamic Fault Allocation.	ITC	1993	DBLP DOI BibTeX RDF
1	Miguel Miranda, Carlos A. López-Barrio	Generation of Optimized Single Distributions of Weights for Random Built-in Self-Test.	ITC	1993	DBLP DOI BibTeX RDF

Publications of Miguel Miranda Miguel Corbalan Miguel Corbalan Miranda ( http://dblp.L3S.de/Authors/Miguel_Miranda )