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Publications of "Mikhail Smelyanskiy" ( http://dblp.L3S.de/Authors/Mikhail_Smelyanskiy )

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Publication years (Num. hits)
2000-2011 (12)
Publication types (Num. hits)
article(3) inproceedings(9)
Venues (Conferences, Journals, ...)
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The graphs summarize 8 occurrences of 8 keywords

Results
Found 12 publication records. Showing 12 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Michael Deisher, Mikhail Smelyanskiy, Brian Nickerson, Victor W. Lee, Michael Chuvelev, Pradeep Dubey Designing and dynamically load balancing hybrid LU for multi/many-core. Search on Bibsonomy Computer Science - R&D The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Daehyun Kim, Joshua Trzasko, Mikhail Smelyanskiy, Clifton Haider, Pradeep Dubey, Armando Manduca High-Performance 3D Compressive Sensing MRI Reconstruction Using Many-Core Architectures. Search on Bibsonomy Int. J. Biomedical Imaging The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Mikhail Smelyanskiy, Karthikeyan Vaidyanathan, Jee Choi, Bálint Joó, Jatin Chhugani, Michael A. Clark, Pradeep Dubey High-performance lattice QCD for multi-core based parallel systems using a cache-friendly hybrid threaded-MPI approach. Search on Bibsonomy SC The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Victor W. Lee, Changkyu Kim, Jatin Chhugani, Michael Deisher, Daehyun Kim, Anthony D. Nguyen, Nadathur Satish, Mikhail Smelyanskiy, Srinivas Chennupaty, Per Hammarlund, Ronak Singhal, Pradeep Dubey Debunking the 100X GPU vs. CPU myth: an evaluation of throughput computing on CPU and GPU. Search on Bibsonomy ISCA The full citation details ... 2010 DBLP  DOI  BibTeX  RDF cpu architecture, gpu architecture, throughput computing, performance analysis, performance measurement, software optimization
1Mikhail Smelyanskiy, David Holmes, Jatin Chhugani, Alan Larson, Doug Carmean, Dennis P. Hanson, Pradeep Dubey, Kurt Augustine, Daehyun Kim, Alan Kyker, Victor W. Lee, Anthony D. Nguyen, Larry Seiler, Richard A. Robb Mapping High-Fidelity Volume Rendering for Medical Imaging to CPU, GPU and Many-Core Architectures. Search on Bibsonomy IEEE Trans. Vis. Comput. Graph. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Sanjeev Kumar, Daehyun Kim, Mikhail Smelyanskiy, Yen-Kuang Chen, Jatin Chhugani, Christopher J. Hughes, Changkyu Kim, Victor W. Lee, Anthony D. Nguyen Atomic Vector Operations on Chip Multiprocessors. Search on Bibsonomy ISCA The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Mikhail Smelyanskiy, Victor W. Lee, Daehyun Kim, Anthony D. Nguyen, Pradeep Dubey Scaling performance of interior-point method on large-scale chip multiprocessor system. Search on Bibsonomy SC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Mikhail Smelyanskiy, Scott A. Mahlke, Edward S. Davidson Probabilistic Predicate-Aware Modulo Scheduling. Search on Bibsonomy CGO The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
1Mikhail Smelyanskiy, Scott A. Mahlke, Edward S. Davidson, Hsien-Hsin S. Lee Predicate-Aware Scheduling: A Technique for Reducing Resource Constraints. Search on Bibsonomy CGO The full citation details ... 2003 DBLP  DOI  BibTeX  RDF predicate analysis, software pipelining, instruction scheduling, VLIW processor, resource utilization, predicated execution
1Kevin Fan, Nathan Clark, Michael L. Chu, K. V. Manjunath, Rajiv A. Ravindran, Mikhail Smelyanskiy, Scott A. Mahlke Systematic Register Bypass Customization for Application-Specific Processors. Search on Bibsonomy ASAP The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
1Hsien-Hsin S. Lee, Mikhail Smelyanskiy, Chris J. Newburn, Gary S. Tyson Stack Value File: Custom Microarchitecture for the Stack. Search on Bibsonomy HPCA The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
1Mikhail Smelyanskiy, Gary S. Tyson, Edward S. Davidson Register Queues: A New Hardware/Software Approach to Efficient Software Pipelining. Search on Bibsonomy IEEE PACT The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
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