Search results for "Mircea Vladutiu"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Mihai Udrescu, Lucian Prodan, Mircea Vladutiu	Simulated fault injection methodology for gate-level quantum circuit reliability assessment.	Simulation Modelling Practice and Theory	2012	DBLP DOI BibTeX RDF
1	Patrik Emanuel Mezö, Mircea Vladutiu, Lucian Prodan	Design of a Hierarchical Based DHT Overlay P2P Routing Algorithm.	CIT	2011	DBLP DOI BibTeX RDF
1	S. F. Mare, Mircea Vladutiu, Lucian Prodan	Decreasing Change Impact Using Smart LSB Pixel Mapping and Data Rearrangement.	CIT	2011	DBLP DOI BibTeX RDF
1	Liviu Agnola, Mircea Vladutiu, Mihai Udrescu, Lucian Prodan	Improving performance of robust Self Adaptive Caches by optimizing the switching algorithm.	DDECS	2011	DBLP DOI BibTeX RDF
1	Oana Boncalo, Alexandru Amaricai, Mihai Udrescu, Mircea Vladutiu	Quantum circuit's reliability assessment with VHDL-based simulated fault injection.	Microelectronics Reliability	2010	DBLP DOI BibTeX RDF
1	Alexandru Amaricai, Mircea Vladutiu, Oana Boncalo	Design Issues and Implementations for Floating-Point Divide-Add Fused.	IEEE Trans. on Circuits and Systems	2010	DBLP DOI BibTeX RDF
1	Flavius Opritoiu, Mircea Vladutiu, Lucian Prodan, Mihai Udrescu	A high-speed AES architecture implementation.	Conf. Computing Frontiers	2010	DBLP DOI BibTeX RDF	cryptochip, optimization, fpga, hardware, aes
1	Cristian Ruican, Mihai Udrescu, Lucian Prodan, Mircea Vladutiu	Performance Analysis for Genetic Quantum Circuit Synthesis.	ICAISC	2010	DBLP DOI BibTeX RDF
1	Flavius Opritoiu, Mircea Vladutiu, Mihai Udrescu, Lucian Prodan	Concurrent Error Detection for Multiplicative Inversion of Advanced Encryption Standard.	CIT	2010	DBLP DOI BibTeX RDF	Galois Field Inversion, Built-In Self Test, Advanced Encryption Standard, Concurrent Error Detection
1	Cristian Ruican, Mihai Udrescu, Lucian Prodan, Mircea Vladutiu	Adaptive vs. Self-adaptive Parameters for Evolving Quantum Circuits.	ICES	2010	DBLP DOI BibTeX RDF
1	Liviu Agnola, Mircea Vladutiu, Mihai Udrescu	Self-Adaptive mechanism for cache memory reliability improvement.	DDECS	2010	DBLP DOI BibTeX RDF
1	Cristian Ruican, Mihai Udrescu, Lucian Prodan, Mircea Vladutiu	Genetic algorithm based quantum circuit synthesis with adaptive parameters control.	IEEE Congress on Evolutionary Computation	2009	DBLP DOI BibTeX RDF
1	Cristian Ruican, Mihai Udrescu, Lucian Prodan, Mircea Vladutiu	Quantum Circuit Synthesis with Adaptive Parameters Control.	EuroGP	2009	DBLP DOI BibTeX RDF
1	Flavius Opritoiu, Mircea Vladutiu, Lucian Prodan, Mihai Udrescu	Built-in self test applicability for the non-linear operations of Advanced Encryption Standard.	SACI	2009	DBLP DOI BibTeX RDF
1	Razvan Bogdan, Mircea Vladutiu	Intrusions Detection in Intelligent Agent-Based Non-traditional Grids.	ICETC	2009	DBLP DOI BibTeX RDF
1	Flavius Opritoiu, Mircea Vladutiu, Mihai Udrescu, Lucian Prodan	Round-level concurrent error detection applied to Advanced Encryption Standard.	DDECS	2009	DBLP DOI BibTeX RDF
1	Versavia Ancusa, Razvan Bogdan, Mircea Vladutiu	Discussing Redundancy Issues in Intelligent Agent-Based Non-traditional Grids.	KES	2008	DBLP DOI BibTeX RDF
1	Alexandru Amaricai, Mircea Vladutiu, Mihai Udrescu, Lucian Prodan, Oana Boncalo	Floating point multiplication rounding schemes for interval arithmetic.	ASAP	2008	DBLP DOI BibTeX RDF
1	Lucian Prodan, Mihai Udrescu, Mircea Vladutiu	Fault-Tolerant Memory Design and Partitioning Issues in Embryonics.	ICES	2008	DBLP DOI BibTeX RDF	genetic algorithms, fault tolerance, reliability, partitioning, memory architecture, knapsack problem, Embryonics
1	Virgil E. Petcu, Alexandru Amaricai, Mircea Vladutiu	A Dual-Threaded Architecture for Interval Arithmetic Coprocessor with Shared Floating Point Units.	DDECS	2008	DBLP DOI BibTeX RDF
1	Versavia Ancusa, Razvan Bogdan, Mircea Vladutiu	Redundancy at Link Level for Non-Traditional Grids Implemented with Intelligent Agents.	NCM	2008	DBLP DOI BibTeX RDF	intelligent grid, sensors, redundancy
1	Lucian Prodan, Mihai Udrescu, Oana Boncalo, Mircea Vladutiu	Design for dependability in emerging technologies.	JETC	2007	DBLP DOI BibTeX RDF	bio-inspired digital design, fault-tolerance assessment, reliability, Dependability, quantum computing, emerging technologies, evolvable hardware, bio-inspired computing, Embryonics
1	Cristian Ruican, Mihai Udrescu, Lucian Prodan, Mircea Vladutiu	A Genetic Algorithm Framework Applied to Quantum Circuit Synthesis.	NICSO	2007	DBLP DOI BibTeX RDF
1	Oana Boncalo, Mihai Udrescu, Lucian Prodan, Mircea Vladutiu, Alexandru Amaricai	Using Simulated Fault Injection for Fault Tolerance Assessment of Quantum Circuits.	Annual Simulation Symposium	2007	DBLP DOI BibTeX RDF
1	Oana Boncalo, Mihai Udrescu, Lucian Prodan, Mircea Vladutiu, Alexandru Amaricai	Saboteur-Based Fault Injection for Quantum Circuits Fault Tolerance Assessment.	DSD	2007	DBLP DOI BibTeX RDF
1	Alexandru Amaricai, Mircea Vladutiu, Lucian Prodan, Mihai Udrescu, Oana Boncalo	Exploiting Parallelism in Double Path Adders' Structure for Increased Throughput of Floating Point Addition.	DSD	2007	DBLP DOI BibTeX RDF
1	Cristian Ruican, Mihai Udrescu, Lucian Prodan, Mircea Vladutiu	Automatic Synthesis for Quantum Circuits Using Genetic Algorithms.	ICANNGA	2007	DBLP DOI BibTeX RDF
1	Oana Boncalo, Mihai Udrescu, Lucian Prodan, Mircea Vladutiu, Alexandru Amaricai	Simulated Fault Injection for Quantum Circuits Based on Simulator Commands.	SACI	2007	DBLP DOI BibTeX RDF
1	Alexandru Amaricai, Mircea Vladutiu, Lucian Prodan, Mihai Udrescu, Oana Boncalo	Design of Addition and Multiplication Units for High Performance Interval Arithmetic Processor.	DDECS	2007	DBLP BibTeX RDF
1	Mihai Udrescu, Lucian Prodan, Mircea Vladutiu	Implementing quantum genetic algorithms: a solution based on Grover's algorithm.	Conf. Computing Frontiers	2006	DBLP DOI BibTeX RDF	genetic algorithms, quantum computing
1	Lucian Prodan, Mihai Udrescu, Mircea Vladutiu	A dependability perspective on emerging technologies.	Conf. Computing Frontiers	2006	DBLP DOI BibTeX RDF	bio-inspired digital design, fault-tolerance assessment, reliability, dependability, quantum computing, emerging technologies, evolvable hardware, bio-inspired computing, embryonics
1	Mihai Udrescu, Lucian Prodan, Mircea Vladutiu	The Bubble Bit Technique as Improvement of HDL-Based Quantum Circuits Simulation.	Annual Simulation Symposium	2005	DBLP DOI BibTeX RDF
1	Lucian Prodan, Mihai Udrescu, Mircea Vladutiu	Multiple-level concatenated coding in embryonics: a dependability analysis.	GECCO	2005	DBLP DOI BibTeX RDF	accuracy threshold, reliability, embryonics, concatenated coding
1	Lucian Prodan, Mihai Udrescu, Mircea Vladutiu	Reliability assessment in embryonics inspired by fault-tolerant quantum computation.	Conf. Computing Frontiers	2005	DBLP DOI BibTeX RDF	bio-inspired digital design, computation accuracy threshold, fault-tolerance assessment, reliability, quantum computing, bio-inspired computing, embryonics
1	Mihai Udrescu, Lucian Prodan, Mircea Vladutiu	Improving quantum circuit dependability with reconfigurable quantum gate arrays.	Conf. Computing Frontiers	2005	DBLP DOI BibTeX RDF	accuracy threshold, reconfigurable quantum gate arrays, coding
1	Lucian Prodan, Mihai Udrescu, Mircea Vladutiu	Survivability of Embryonic Memories: Analysis and Design Principles.	Evolvable Hardware	2005	DBLP DOI BibTeX RDF
1	Valentin Muresan, Xiaojun Wang, Valentina Muresan, Mircea Vladutiu	Greedy Tree Growing Heuristics on Block-Test Scheduling Under Power Constraints.	J. Electronic Testing	2004	DBLP DOI BibTeX RDF	block-test scheduling, greedy algorithms, power constraints
1	Mihai Udrescu, Lucian Prodan, Mircea Vladutiu	Using HDLs for describing quantum circuits: a framework for efficient quantum algorithm simulation.	Conf. Computing Frontiers	2004	DBLP DOI BibTeX RDF	bubble logic, simulation, views, hardware description languages, quantum algorithms, quantum circuits, entanglement
1	Lucian Prodan, Mihai Udrescu, Mircea Vladutiu	Self-Repairing Embryonic Memory Arrays.	Evolvable Hardware	2004	DBLP DOI BibTeX RDF
1	Valentin Muresan, Xiaojun Wang, Valentina Muresan, Mircea Vladutiu	Mixed Classical Scheduling Algorithms and Tree Growing Technique in Block-Test Scheduling under Power Constraints.	IEEE International Workshop on Rapid System Prototyping	2001	DBLP DOI BibTeX RDF
1	V. Muresan, Xiaojun Wang, Mircea Vladutiu	A combined tree growing technique for block-test scheduling under power constraints.	ISCAS	2001	DBLP DOI BibTeX RDF
1	Valentin Muresan, Xiaojun Wang, Valentina Muresan, Mircea Vladutiu	A comparison of classical scheduling approaches in power-constrained block-test scheduling.	ITC	2000	DBLP DOI BibTeX RDF
1	Valentin Muresan, Xiaojun Wang, Valentina Muresan, Mircea Vladutiu	Power-Constrained Block-Test List Scheduling. (PDF / PS)	IEEE International Workshop on Rapid System Prototyping	2000	DBLP DOI BibTeX RDF	Block-Test Scheduling, Tree-Growing Technique, Power Dissipation, List Scheduling
1	Valentin Muresan, Xiaojun Wang, Valentina Muresan, Mircea Vladutiu	Distribution-graph based approach and extended tree growing technique in power-constrained block-test scheduling.	Asian Test Symposium	2000	DBLP DOI BibTeX RDF	distribution-graph based approach, extended tree growing technique, power-constrained block-test scheduling, unequal-length block-test scheduling, power dissipation constraints, test concurrency, assigned power dissipation limits, balanced test power dissipation, least mean square error function, global priority function, system-level test scheduling algorithm, scheduling, VLSI, fault diagnosis, logic testing, high level synthesis, integrated circuit testing, automatic test pattern generation, trees (mathematics), least mean squares methods
1	Valentin Muresan, Xiaojun Wang, Valentina Muresan, Mircea Vladutiu	The Left Edge Algorithm and the Tree Growing Technique in Block-Test Scheduling under Power Constraints.	VTS	2000	DBLP DOI BibTeX RDF

Publications of "Mircea Vladutiu" ( http://dblp.L3S.de/Authors/Mircea_Vladutiu )