| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry |
On-Chip Process Variations Compensation Using an Analog Adaptive Body Bias (A-ABB).  |
IEEE Trans. VLSI Syst.  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry |
A Novel Low Area Overhead Direct Adaptive Body Bias (D-ABB) Circuit for Die-to-Die and Within-Die Variations Compensation. |
IEEE Trans. VLSI Syst. |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry |
Analytical Soft Error Models Accounting for Die-to-Die and Within-Die Variations in Sub-Threshold SRAM Cells. |
IEEE Trans. VLSI Syst. |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry |
A Bias-Dependent Model for the Impact of Process Variations on the SRAM Soft Error Immunity. |
IEEE Trans. VLSI Syst. |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry |
Adaptive Body Bias for Reducing the Impacts of NBTI and Process Variations on 6T SRAM Cells. |
IEEE Trans. on Circuits and Systems |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry |
Novel Timing Yield Improvement Circuits for High-Performance Low-Power Wide Fan-In Dynamic OR Gates. |
IEEE Trans. on Circuits and Systems |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohammed El-Abd, Hassan Hassan, Mohab Anis, Mohamed S. Kamel, Mohamed I. Elmasry |
Discrete cooperative particle swarm optimization for FPGA placement. |
Appl. Soft Comput. |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Ahmed Youssef, Mohamed Zahran, Mohab Anis, Mohamed I. Elmasry |
On the Power Management of Simultaneous Multithreading Processors. |
IEEE Trans. VLSI Syst. |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry |
A Design-Oriented Soft Error Rate Variation Model Accounting for Both Die-to-Die and Within-Die Variations in Submicrometer CMOS SRAM Cells. |
IEEE Trans. on Circuits and Systems |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Ahmed Youssef, Zhen Yang, Mohab Anis, Shawki Areibi, Anthony Vannelli, Mohamed I. Elmasry |
A Power-Efficient Multipin ILP-Based Routing Technique. |
IEEE Trans. on Circuits and Systems |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry |
Comparative analysis of power yield improvement under process variation of sub-threshold flip-flops. |
ISCAS |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry |
Statistical timing yield improvement of dynamic circuits using negative capacitance technique. |
ISCAS |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Hassan Hassan, Mohab Anis, Mohamed I. Elmasry |
Total Power Modeling in FPGAs Under Spatial Correlation. |
IEEE Trans. VLSI Syst. |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Kambiz K. Moez, Mohamed I. Elmasry |
A New Loss Compensation Technique for CMOS Distributed Amplifiers. |
IEEE Trans. on Circuits and Systems |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry |
Comparative Analysis of Timing Yield Improvement under Process Variations of Flip-Flops Circuits. |
ISVLSI |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Hassan Hassan, Mohab Anis, Mohamed I. Elmasry |
Input Vector Reordering for Leakage Power Reduction in FPGAs. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Ahmed Youssef, Mohab Anis, Mohamed I. Elmasry |
A Comparative Study Between Static and Dynamic Sleep Signal Generation Techniques for Leakage Tolerant Designs. |
IEEE Trans. VLSI Syst. |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Kambiz K. Moez, Mohamed I. Elmasry |
A Low-Noise CMOS Distributed Amplifier for Ultra-Wide-Band Applications. |
IEEE Trans. on Circuits and Systems |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Ahmed Youssef, Tor Myklebust, Mohab Anis, Mohamed I. Elmasry |
A Low-Power Multi-Pin Maze Routing Methodology. |
ISQED |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Hassan Hassan, Mohab Anis, Mohamed I. Elmasry |
A Timing-Driven Algorithm for Leakage Reduction in MTCMOS FPGAs. |
ASP-DAC |
2007 |
DBLP DOI BibTeX RDF |
0.13 micron, timing-driven algorithm, MTCMOS FPGA, MTCMOS CAD methodology, subthreshold leakage power reduction, nanometer FPGA, circuit timing information, CMOS process |
| 1 | Kambiz K. Moez, Mohamed I. Elmasry |
Lumped-element analysis and design of CMOS distributed amplifiers with image impedance termination. |
Microelectronics Journal |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Hassan Hassan, Mohab Anis, Mohamed I. Elmasry |
Impact of technology scaling and process variations on RF CMOS devices. |
Microelectronics Journal |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Hassan Hassan, Mohab Anis, Mohamed I. Elmasry |
Low-power multi-threshold MCML: Analysis, design, and variability. |
Microelectronics Journal |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Ahmed Youssef, Mohab Anis, Mohamed I. Elmasry |
Dynamic Standby Prediction for Leakage Tolerant Microprocessor Functional Units. |
MICRO |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Kambiz K. Moez, Mohamed I. Elmasry |
A 10-GHz 15-dB four-stage distributed amplifier in 0.18 µm CMOS process. |
DATE |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | A. Ismail, Mohamed I. Elmasry |
A termination technique for the averaging network of flash ADC's. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Hassan Hassan, Mohab Anis, Mohamed I. Elmasry |
MOS current mode circuits: analysis, design, and variability. |
IEEE Trans. VLSI Syst. |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Ahmed Youssef, Mohab Anis, Mohamed I. Elmasry |
POMR: a power-aware interconnect optimization methodology. |
IEEE Trans. VLSI Syst. |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Hassan Hassan, Mohab Anis, Mohamed I. Elmasry |
Design and optimization of MOS current mode logic for parameter variations. |
Integration |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Hassan Hassan, Mohab Anis, Mohamed I. Elmasry |
LAP: a logic activity packing methodology for leakage power-tolerant FPGAs. |
ISLPED |
2005 |
DBLP DOI BibTeX RDF |
activity profile, basic logic elements (BLEs), configurable logic blocks (CLBs), sleep transistor (ST), sub-threshold leakage power, FPGA, packing |
| 1 | Payam Ghafari, Ehsan Mirhadi, Mohab Anis, Shawki Areibi, Mohamed I. Elmasry |
A Low-Power Partitioning Methodology by Maximizing Sleep Time and Minimizing Cut Nets. |
IWSOC |
2005 |
DBLP DOI BibTeX RDF |
Subthreshold Leakage Power, Sleep Time, Geometric Iterative Improvement, Genetic Algorithm, Partitioning, Segmented Trees |
| 1 | Hassan Hassan, Mohab Anis, Mohamed I. Elmasry |
A leakage-aware CAD flow for MTCMOS FPGA architectures (abstract only). |
FPGA |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Hassan Hassan, Mohab Anis, Antoine El Daher, Mohamed I. Elmasry |
Activity Packing in FPGAs for Leakage Power Reduction. |
DATE |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Hassan Hassan, Mohab Anis, Mohamed I. Elmasry |
Design and optimization of MOS current mode logic for parameter variations. |
ACM Great Lakes Symposium on VLSI |
2004 |
DBLP DOI BibTeX RDF |
MCML, optimization, design, automation, variation, technology scaling |
| 1 | Mohab Anis, Shawki Areibi, Mohamed I. Elmasry |
Design and optimization of multithreshold CMOS (MTCMOS) circuits. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohab Anis, Mohamed W. Allam, Mohamed I. Elmasry |
Energy-efficient noise-tolerant dynamic styles for scaled-down CMOS and MTCMOS technologies. |
IEEE Trans. VLSI Syst. |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Nasser Masoumi, Mohamed I. Elmasry, Safieddin Safavi-Naeini, Haydar Hadi |
A Novel Analytical Model for Evaluation of Substrate Crosstalk in VLSI Circuits. |
DELTA |
2002 |
DBLP DOI BibTeX RDF |
Substrate coupling modeling, image method, Green's function |
| 1 | Mohab Anis, Mohamed Mahmoud, Mohamed I. Elmasry, Shawki Areibi |
Dynamic and leakage power reduction in MTCMOS circuits using an automated efficient gate clustering technique. |
DAC |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | D. A. F. Ei-Dib, Mohamed I. Elmasry |
Low-power register-exchange Viterbi decoder for high-speed wireless communications. |
ISCAS |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | A. E. Hussein, Mohamed I. Elmasry |
Fractional-N frequency synthesizer for wireless communications. |
ISCAS |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohab Anis, Mohamed I. Elmasry |
Self-timed MOS current mode logic for digital applications. |
ISCAS |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Muhammad M. Khellah, Mohamed I. Elmasry |
A low-power high-performance current-mode multiport SRAM. |
IEEE Trans. VLSI Syst. |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Muhammad E. S. Elrabaa, Mohamed I. Elmasry |
Split-Gate Logic circuits for multi-threshold technologies. |
ISCAS |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Nasser Masoumi, Mohamed I. Elmasry, Safieddin Safavi-Naeini |
Fast and efficient parametric modeling of contact-to-substratecoupling. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | B. A. White, Mohamed I. Elmasry |
Low-power design of decimation filters for a digital IF receiver. |
IEEE Trans. VLSI Syst. |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohamed W. Allam, Mohab Anis, Mohamed I. Elmasry |
High-speed dynamic logic styles for scaled-down CMOS and MTCMOS technologies. |
ISLPED |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | A. E. Hussein, Mohamed I. Elmasry |
Low power high speed analog-to-digital converter for wireless communications. |
ACM Great Lakes Symposium on VLSI |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Nasser Masoumi, Safieddin Safavi-Naeini, Mohamed I. Elmasry |
An Efficient and Accurate Model for RF/Microwave Spiral Inductors Using Microstrip Lines Theory. (PDF / PS) |
ICCD |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Ayman ElSayed, Akbar Ali, Mohamed I. Elmasry |
Differential PLL for wireless applications using differential CMOS LC-VCO and differential charge pump. |
ISLPED |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Amr N. Hafez, Mohamed I. Elmasry |
A Novel Low Power Low Phase-Noise PLL Architecture for Wireless Transceivers. (PDF / PS) |
Great Lakes Symposium on VLSI |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Nasser Masoumi, Mohamed I. Elmasry, Safieddin Safavi-Naeini |
A Fast Parametric Model for Contact-Substrate Coupling. |
VLSI |
1999 |
DBLP BibTeX RDF |
|
| 1 | A. M. Fahim, Mohamed I. Elmasry |
A low-power CMOS frequency synthesizer design methodology for wireless applications. |
ISCAS |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | A. M. Fahim, Mohamed I. Elmasry |
A Low-Voltage High-Performance Differential Static Logic (LVDSL) family. |
ISCAS |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Maitham Shams, Mohamed I. Elmasry |
A formulation for quick evaluation and optimization of digital CMOS circuits. |
ISCAS |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Amr N. Hafez, Mohamed I. Elmasry |
A low power monolithic subsampled phase-locked loop architecture for wireless transceivers. |
ISCAS |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Maitham Shams, Mohamed I. Elmasry |
Delay Optimization of CMOS Logic Circuits Using Closed-Form Expressions. |
ICCD |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Maitham Shams, Jo C. Ebergen, Mohamed I. Elmasry |
Modeling and comparing CMOS implementations of the C-element. |
IEEE Trans. VLSI Syst. |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Amr G. Wassal, M. Anwarul Hasan, Mohamed I. Elmasry |
Low-Power Design of Finite Field Multipliers for Wireless Applications. |
Great Lakes Symposium on VLSI |
1998 |
DBLP DOI BibTeX RDF |
architecture, low power, finite fields, multiplier |
| 1 | Muhammad M. Khellah, Mohamed I. Elmasry |
Effective Capacitance Macro-Modelling for Architectural-Level Power Estimation. |
Great Lakes Symposium on VLSI |
1998 |
DBLP DOI BibTeX RDF |
low-power design, power estimation, high-level design |
| 1 | A. M. Fahim, Muhammad M. Khellah, Mohamed I. Elmasry |
A Low-Power High-Performance Embedded SRAM Macrocell. |
Great Lakes Symposium on VLSI |
1998 |
DBLP DOI BibTeX RDF |
low power, memory, DSP, high performance, SRAM |
| 1 | David Zhang, Mohamed I. Elmasry |
VLSI compressor design with applications to digital neural networks. |
IEEE Trans. VLSI Syst. |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Emad N. Farag, Ran-Hong Yan, Mohamed I. Elmasry |
A programmable power-efficient decimation filter for software radios. |
ISLPED |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Maitham Shams, Jo C. Ebergen, Mohamed I. Elmasry |
Optimizing CMOS Implementations of the C-element. |
ICCD |
1997 |
DBLP BibTeX RDF |
|
| 1 | Maitham Shams, Jo C. Ebergen, Mohamed I. Elmasry |
A comparison of CMOS implementations of an asynchronous circuits primitive: the C-element. |
ISLPED |
1996 |
DBLP DOI BibTeX RDF |
|
| 1 | Emad N. Farag, Mohamed I. Elmasry |
Low-Power Implementation of Discrete Cosine Transform. |
Great Lakes Symposium on VLSI |
1996 |
DBLP DOI BibTeX RDF |
|
| 1 | Michael S. Obrecht, Mohamed I. Elmasry, Edwin L. Heasell |
TRASIM: compact and efficient two-dimensional transient simulator for arbitrary planar semiconductor devices. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
1995 |
DBLP DOI BibTeX RDF |
|
| 1 | Shaahin Hessabi, M. Y. Osman, Mohamed I. Elmasry |
Differential BiCMOS logic circuits: fault characterization and design-for-testability. |
IEEE Trans. VLSI Syst. |
1995 |
DBLP DOI BibTeX RDF |
|
| 1 | I. S. Abu-Khater, A. Bellaouar, Mohamed I. Elmasry, Ran-Hong Yan |
Circuit/architecture for low-power high-performance 32-bit adder. |
Great Lakes Symposium on VLSI |
1995 |
DBLP DOI BibTeX RDF |
conditional sum architecture, CPL-like logic implementation, power supply voltage, minimum size, optimized speed, 1 to 3.3 V, logic design, CMOS, integrated circuit design, adders, adder, CMOS logic circuits, circuit optimisation, 32 bit |
| 1 | R. X. Gu, Mohamed I. Elmasry |
Power Dissipation in Deep Submicron CMOS Digital Circuits. |
ISCAS |
1995 |
DBLP BibTeX RDF |
|
| 1 | Li Deng, Khaled Hassanein, Mohamed I. Elmasry |
Analysis of the correlation structure for a neural predictive model with application to speech recognition. |
Neural Networks |
1994 |
DBLP DOI BibTeX RDF |
|
| 1 | Arun Achyuthan, Mohamed I. Elmasry |
Mixed analog/digital hardware synthesis of artificial neural networks. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
1994 |
DBLP DOI BibTeX RDF |
|
| 1 | R. X. Gu, Mohamed I. Elmasry |
An All-N-Logic High-Speed Single-Phase Dynamic CMOS Logic. |
ISCAS |
1994 |
DBLP BibTeX RDF |
|
| 1 | K. M. Sharaf, Mohamed I. Elmasry |
BiCMOS Active-Pull-Down Non-Threshold Logic Cicuits for High-Speed Low-Power Applications. |
ISCAS |
1994 |
DBLP BibTeX RDF |
|
| 1 | Catherine H. Gebotys, Mohamed I. Elmasry |
Global optimization approach for architectural synthesis. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
1993 |
DBLP DOI BibTeX RDF |
|
| 1 | L. Song, Mohamed I. Elmasry, Anthony Vannelli |
Analog neural network building blocks based on current mode subthreshold operation. |
ISCAS |
1993 |
DBLP BibTeX RDF |
|
| 1 | J. Paul Harvey, Mohamed I. Elmasry, Bosco Leung |
STAIC: an interactive framework for synthesizing CMOS and BiCMOS analog circuits. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
1992 |
DBLP DOI BibTeX RDF |
|
| 1 | Catherine H. Gebotys, Mohamed I. Elmasry |
Simultaneous Scheduling and Allocation for Cost Constrained Optimal Architectural Synthesis. |
DAC |
1991 |
DBLP DOI BibTeX RDF |
|
| 1 | Catherine H. Gebotys, Mohamed I. Elmasry |
A Global Optimization Approach for Architectural Synthesis. |
ICCAD |
1990 |
DBLP BibTeX RDF |
|
| 1 | Baher Haroun, Mohamed I. Elmasry |
Architectural synthesis for DSP silicon compilers. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
1989 |
DBLP DOI BibTeX RDF |
|
| 1 | O. A. Buset, Mohamed I. Elmasry |
ACE: A Hierarchical Graphical Interface for Architectual Synthesis. |
DAC |
1989 |
DBLP DOI BibTeX RDF |
|
| 1 | Catherine H. Gebotys, Mohamed I. Elmasry |
VLSI Design Synthesis with Testability. |
DAC |
1988 |
DBLP BibTeX RDF |
|
| 1 | Kevin S. B. Szabo, James M. Leask, Mohamed I. Elmasry |
Symbolic Layout for Bipolar and MOS VLSI. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
1987 |
DBLP DOI BibTeX RDF |
|
| 1 | Patrick A. D. Powell, Mohamed I. Elmasry |
The icewater language and interpreter. |
DAC |
1984 |
DBLP BibTeX RDF |
|
| 1 | A. R. Teene, Mohamed I. Elmasry, David J. Roulston |
WATPC: A Computer-Aided Design Package for Digital Bipolar Integrated Circuits. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
1982 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohamed I. Elmasry |
Logic Design Using EFL Structures. |
IEEE Trans. Computers |
1976 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohamed I. Elmasry, Philip M. Thompson |
Two-Level Emitter-Function Logic Structures for Logic-in-Memory Computers. |
IEEE Trans. Computers |
1975 |
DBLP DOI BibTeX RDF |
emitter-function logic (EFL), high-speed realization, logic-in memory (LIM) computers, multiemitter two-level structures (METTL), large-scale integration (LSI), Current-mode logic |
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