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Publications of "Mohd. Hasan" ( http://dblp.L3S.de/Authors/Mohd._Hasan )

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Publication years (Num. hits)
2002-2012 (14)
Publication types (Num. hits)
article(4) inproceedings(10)
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Found 14 publication records. Showing 14 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Aminul Islam, Mohd. Hasan A technique to mitigate impact of process, voltage and temperature variations on design metrics of SRAM Cell. Search on Bibsonomy Microelectronics Reliability The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1S. D. Pable, Mohd. Hasan Ultra-low-power signaling challenges for subthreshold global interconnects. Search on Bibsonomy Integration The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1S. D. Pable, Mohd. Hasan High speed interconnect through device optimization for subthreshold FPGA. Search on Bibsonomy Microelectronics Journal The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1S. D. Pable, Mohd. Hasan Performance analysis of FPGA interconnect fabric for ultra-low power applications. Search on Bibsonomy ICCCS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1S. D. Pable, Mohd. Hasan Performance optimization of CNFET for ultra-low power reconfigurable architecture. Search on Bibsonomy ICCCS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Aminul Islam, Mohd. Hasan High Speed Cache Design Using Multi-diameter CNFET at 32nm Technology. Search on Bibsonomy ICT The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1A. K. Kureshi, Mohd. Hasan Performance comparison of CNFET- and CMOS-based 6T SRAM cell in deep submicron. Search on Bibsonomy Microelectronics Journal The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1A. K. Kureshi, Naushad Alam, Mohd. Hasan, Tughrul Arslan Subthreshold Deep Submicron Performance Investigation of CMOS and DTCMOS Biasing Schemes for Reconfigurable Computing. Search on Bibsonomy ISCAS The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Naushad Alam, A. K. Kureshi, Mohd. Hasan, Tughrul Arslan Carbon Nanotube Interconnects for Low-power High-speed Applications. Search on Bibsonomy ISCAS The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Mohd. Hasan, A. K. Kureshi, Tughrul Arslan Leakage Reduction in FPGA Routing Multiplexers. Search on Bibsonomy ISCAS The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Wei Han, Ahmet T. Erdogan, Tughrul Arslan, Mohd. Hasan The development of high performance FFT IP cores through hybrid low power algorithmic methodology. Search on Bibsonomy ASP-DAC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
1Wei Han, Ahmet T. Erdogan, Tughrul Arslan, Mohd. Hasan Low power commutator for pipelined FFT processors. Search on Bibsonomy ISCAS The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
1Mohd. Hasan, Tughrul Arslan A triple port RAM based low power commutator architecture for a pipelined FFT processor. Search on Bibsonomy ISCAS The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
1Mohd. Hasan, Tughrul Arslan A coefficient memory addressing scheme for VLSI implementation of FFT processors. Search on Bibsonomy ISCAS The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
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