Search results for "Nacho Navarro"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Ramon Bertran, Yolanda Becerra, David Carrera, Vicenç Beltran, Marc González, Xavier Martorell, Nacho Navarro, Jordi Torres, Eduard Ayguadé	Energy accounting for shared virtualized environments under DVFS using PMC-based power models.	Future Generation Comp. Syst.	2012	DBLP DOI BibTeX RDF
1	Muhammad Shafiq, Miquel Pericàs, Nacho Navarro, Eduard Ayguadé	BSArc: blacksmith streaming architecture for HPC accelerators.	Conf. Computing Frontiers	2012	DBLP DOI BibTeX RDF
1	Tassadaq Hussain, Muhammad Shafiq, Miquel Pericàs, Nacho Navarro, Eduard Ayguadé	PPMC: A Programmable Pattern Based Memory Controller.	ARC	2012	DBLP DOI BibTeX RDF
1	Mauricio Araya-Polo, Javier Cabezas, Mauricio Hanzich, Miquel Pericàs, Félix Rubio, Isaac Gelado, Muhammad Shafiq, Enric Morancho, Nacho Navarro, Eduard Ayguadé, José María Cela, Mateo Valero	Assessing Accelerator-Based HPC Reverse Time Migration.	IEEE Trans. Parallel Distrib. Syst.	2011	DBLP DOI BibTeX RDF	Reverse time migration, Cell/B.E., geophysics, FPGA, GPU, accelerators
1	Ramon Bertran, Marc González, Xavier Martorell, Nacho Navarro, Eduard Ayguadé	Local Memory Design Space Exploration for High-Performance Computing.	Comput. J.	2011	DBLP DOI BibTeX RDF
1	Lluc Alvarez, Ramon Bertran, Marc González, Xavier Martorell, Nacho Navarro, Eduard Ayguadé	Design space exploration for aggressive core replication schemes in CMPs.	HPDC	2011	DBLP DOI BibTeX RDF
1	Carlos Villavieja, Yoav Etsion, Alex Ramírez, Nacho Navarro	FELI: HW/SW Support for On-Chip Distributed Shared Memory in Multicores.	Euro-Par	2011	DBLP DOI BibTeX RDF
1	Carlos Villavieja, Vasileios Karakostas, Lluís Vilanova, Yoav Etsion, Alex Ramírez, Avi Mendelson, Nacho Navarro, Adrián Cristal, Osman S. Unsal	DiDi: Mitigating the Performance Impact of TLB Shootdowns Using a Shared TLB Directory.	PACT	2011	DBLP DOI BibTeX RDF
1	Tassadaq Hussain, Miquel Pericàs, Nacho Navarro, Eduard Ayguadé	Implementation of a Reverse Time Migration kernel using the HCE High Level Synthesis tool.	FPT	2011	DBLP DOI BibTeX RDF
1	Mateo Valero, Nacho Navarro	Multicore: The View from Europe.	IEEE Micro	2010	DBLP DOI BibTeX RDF	European research, HiPEAC, multicore
1	Muhammad Shafiq, Miquel Pericàs, Nacho Navarro, Eduard Ayguadé	FEM: A Step Towards a Common Memory Layout for FPGA Based Accelerators.	FPL	2010	DBLP DOI BibTeX RDF
1	Isaac Gelado, Javier Cabezas, Nacho Navarro, John E. Stone, Sanjay J. Patel, Wen-mei W. Hwu	An asymmetric distributed shared memory model for heterogeneous parallel systems.	ASPLOS	2010	DBLP DOI BibTeX RDF	asymmetric distributed shared memory, data-centric programming models, heterogeneous systems
1	Ramon Bertran, Marc González, Xavier Martorell, Nacho Navarro, Eduard Ayguadé	Decomposable and responsive power models for multicore processors using performance counters.	ICS	2010	DBLP DOI BibTeX RDF	power estimation, performance counters
1	Steven S. Lumetta, Nacho Navarro	CASES 2007 guest editors' introduction.	Design Autom. for Emb. Sys.	2009	DBLP DOI BibTeX RDF
1	Dominique Chanet, Javier Cabezas, Enric Morancho, Nacho Navarro, Koen De Bosschere	Linux Kernel Compaction through Cold Code Swapping.	T. HiPEAC	2009	DBLP DOI BibTeX RDF
1	Julio Merino, Lluc Alvarez, Marisa Gil, Nacho Navarro	Cetra: A trace and analysis framework for the evaluation of Cell BE systems.	ISPASS	2009	DBLP DOI BibTeX RDF
1	Javier Cabezas, Mauricio Araya-Polo, Isaac Gelado, Nacho Navarro, Enric Morancho, José María Cela	High-Performance Reverse Time Migration on GPU.	SCCC	2009	DBLP DOI BibTeX RDF
1	Víctor J. Jiménez, Lluís Vilanova, Isaac Gelado, Marisa Gil, Grigori Fursin, Nacho Navarro	Predictive Runtime Code Scheduling for Heterogeneous Architectures.	HiPEAC	2009	DBLP DOI BibTeX RDF
1	Isaac Gelado, John H. Kelm, Shane Ryoo, Steven S. Lumetta, Nacho Navarro, Wen-mei W. Hwu	CUBA: an architecture for efficient CPU/co-processor data communication.	ICS	2008	DBLP DOI BibTeX RDF	co-processors
1	Koen De Bosschere, Wayne Luk, Xavier Martorell, Nacho Navarro, Michael F. P. O'Boyle, Dionisios N. Pnevmatikatos, Alex Ramírez, Pascal Sainrat, André Seznec, Per Stenström, Olivier Temam	High-Performance Embedded Architecture and Compilation Roadmap.	T. HiPEAC	2007	DBLP DOI BibTeX RDF	HiPEAC, single core architecture, programming models and tools, simulation and system modelling, real-time systems, compilation, interconnection networks, benchmarking, reconfigurable computing, run-time systems, multi-core architecture, roadmap
1	John H. Kelm, Isaac Gelado, Mark J. Murphy, Nacho Navarro, Steven S. Lumetta, Wen-mei W. Hwu	CIGAR: Application Partitioning for a CPU/Coprocessor Architecture.	PACT	2007	DBLP DOI BibTeX RDF
1	Wen-mei W. Hwu, Shane Ryoo, Sain-Zee Ueng, John H. Kelm, Isaac Gelado, Sam S. Stone, Robert E. Kidd, Sara S. Baghsorkhi, Aqeel Mahesri, Stephanie C. Tsao, Nacho Navarro, Steven S. Lumetta, Matthew I. Frank, Sanjay J. Patel	Implicitly Parallel Programming Models for Thousand-Core Microprocessors.	DAC	2007	DBLP DOI BibTeX RDF
1	Taewhan Kim, Pascal Sainrat, Steven S. Lumetta, Nacho Navarro (eds.)	Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007	CASES	2007	DBLP BibTeX RDF
1	Yolanda Becerra, Jordi Garcia, Toni Cortes, Nacho Navarro	Java Virtual Machine: the key for accurated memory prefetching.	Software Engineering Research and Practice	2006	DBLP BibTeX RDF
1	Thomas M. Conte, Nacho Navarro, Wen-mei W. Hwu, Mateo Valero, Theo Ungerer (eds.)	High Performance Embedded Architectures and Compilers, First International Conference, HiPEAC 2005, Barcelona, Spain, November 17-18, 2005, Proceedings	HiPEAC	2005	DBLP BibTeX RDF
1	Yolanda Becerra, Toni Cortes, Jordi Garcia, Nacho Navarro	Evaluating the importance of virtual memory for Java.	ISPASS	2003	DBLP DOI BibTeX RDF
1	Ronald D. Barnes, Erik M. Nystrom, John W. Sias, Sanjay J. Patel, Nacho Navarro, Wen-mei W. Hwu	Beating in-order stalls with "flea-flicker" two-pass pipelining.	MICRO	2003	DBLP DOI BibTeX RDF
1	José Oliver, Jordi Guitart, Eduard Ayguadé, Nacho Navarro, Jordi Torres	Strategies for the efficient exploitation of loop-level parallelism in Java.	Concurrency and Computation: Practice and Experience	2001	DBLP DOI BibTeX RDF
1	Marc González, Eduard Ayguadé, Xavier Martorell, Jesús Labarta, Nacho Navarro, José Oliver	NanosCompiler: supporting flexible multilevel parallelism exploitation in OpenMP.	Concurrency - Practice and Experience	2000	DBLP DOI BibTeX RDF
1	Albert Serra, Nacho Navarro, Toni Cortes	DITools: Application-level Support for Dynamic Extension and Flexible Composition.	USENIX Annual Technical Conference, General Track	2000	DBLP BibTeX RDF
1	Marc González, Albert Serra, Xavier Martorell, José Oliver, Eduard Ayguadé, Jesús Labarta, Nacho Navarro	Applying Interposition Techniques for Performance Analysis of OpenMP Parallel Applications. (PDF / PS)	IPDPS	2000	DBLP DOI BibTeX RDF
1	Xavier Martorell, Julita Corbalán, Dimitrios S. Nikolopoulos, Nacho Navarro, Eleftherios D. Polychronopoulos, Theodore S. Papatheodorou, Jesús Labarta	A Tool to Schedule Parallel Applications on Multiprocessors: The NANOS CPU MANAGER.	JSSPP	2000	DBLP DOI BibTeX RDF
1	Marc González, José Oliver, Xavier Martorell, Eduard Ayguadé, Jesús Labarta, Nacho Navarro	OpenMP Extensions for Thread Groups and Their Run-Time Support.	LCPC	2000	DBLP DOI BibTeX RDF
1	José Oliver, Eduard Ayguadé, Nacho Navarro	Towards an efficient exploitation of loop-level parallelism in Java.	Java Grande	2000	DBLP DOI BibTeX RDF
1	Eduard Ayguadé, Xavier Martorell, Jesús Labarta, Marc González, Nacho Navarro	Exploiting Multiple Levels of Parallelism in OpenMP: A Case Study. (PDF / PS)	ICPP	1999	DBLP DOI BibTeX RDF	Multiple levels of parallelism, Parallel programming, OpenMP, User-level threads
1	Xavier Martorell, Eduard Ayguadé, Nacho Navarro, Julita Corbalán, Marc González, Jesús Labarta	Thread fork/join techniques for multi-level parallelism exploitation in NUMA multiprocessors.	International Conference on Supercomputing	1999	DBLP DOI BibTeX RDF
1	Eleftherios D. Polychronopoulos, Xavier Martorell, Dimitrios S. Nikolopoulos, Jesús Labarta, Theodore S. Papatheodorou, Nacho Navarro	Kernel-level Scheduling for the Nano-threads Programming Model.	International Conference on Supercomputing	1998	DBLP DOI BibTeX RDF
1	Xavier Martorell, Jesús Labarta, Nacho Navarro, Eduard Ayguadé	Analysis of Several Scheduling Algorithms under the Nano-Thread Programming Model. (PDF / PS)	IPPS	1997	DBLP DOI BibTeX RDF	scheduling algorithm analysis, nano-threads programming model, dynamic processor allocation environment, uniform-sized chunking, guided self-scheduling, trapezoid self-scheduling, adaptable size chunking, automatic application decomposition, hierarchical task graph, source application, executable graph representation, user-level library, nano-threads library, user-level process, CPU manager, dynamic processor changes, processor scheduling, parallelizing compiler, parallel code
1	Eduard Ayguadé, Xavier Martorell, Jesús Labarta, Marc González, Nacho Navarro	Exploiting Parallelism Through Directives on the Nano-Threads Programming Model.	LCPC	1997	DBLP DOI BibTeX RDF
1	Xavier Martorell, Jesús Labarta, Nacho Navarro, Eduard Ayguadé	A Library Implementation of the Nano-Threads Programming Model.	Euro-Par, Vol. II	1996	DBLP DOI BibTeX RDF
1	Marisa Gil, Xavier Martorell, Nacho Navarro	The eXc Model: Scheduler-Activations on Mach 3.0.	Parallel and Distributed Computing and Systems	1995	DBLP BibTeX RDF

Publications of "Nacho Navarro" ( http://dblp.L3S.de/Authors/Nacho_Navarro )