|
|
|
|
Venues (Conferences, Journals, ...)
|
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 10 occurrences of 9 keywords
|
|
|
|
|
Results
Found 14 publication records. Showing 14 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Naghmeh Karimi, Krishnendu Chakrabarty, Pallav Gupta, Srinivas Patil |
Test generation for clock-domain crossing faults in integrated circuits.  |
DATE  |
2012 |
DBLP BibTeX RDF |
|
| 1 | Michail Maniatakos, Naghmeh Karimi, Chandra Tirumurti, Abhijit Jas, Yiorgos Makris |
Instruction-Level Impact Analysis of Low-Level Faults in a Modern Microprocessor Controller. |
IEEE Trans. Computers |
2011 |
DBLP DOI BibTeX RDF |
instruction-level error, microprocessor controller, Fault simulation, concurrent error detection |
| 1 | Naghmeh Karimi, Michail Maniatakos, Abhijit Jas, Chandra Tirumurti, Yiorgos Makris |
Workload-Cognizant Concurrent Error Detection in the Scheduler of a Modern Microprocessor. |
IEEE Trans. Computers |
2011 |
DBLP DOI BibTeX RDF |
scheduler, microprocessor, invariance, Concurrent error detection |
| 1 | Naghmeh Karimi, Zhiqiu Kong, Krishnendu Chakrabarty, Pallav Gupta, Srinivas Patil |
Testing of Clock-Domain Crossing Faults in Multi-core System-on-Chip. |
Asian Test Symposium |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Michail Maniatakos, Naghmeh Karimi, Chandra Tirumurti, Abhijit Jas, Yiorgos Makris |
Instruction-Level Impact Comparison of RT- vs. Gate-Level Faults in a Modern Microprocessor Controller. |
VTS |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Naghmeh Karimi, Michail Maniatakos, Chandra Tirumurti, Abhijit Jas, Yiorgos Makris |
Impact analysis of performance faults in modern microprocessors. |
ICCD |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Naghmeh Karimi, Armin Alaghi, Mahshid Sedghi, Zainalabedin Navabi |
Online Network-on-Chip Switch Fault Detection and Diagnosis Using Functional Switch Faults. |
J. UCS |
2008 |
DBLP BibTeX RDF |
|
| 1 | Naghmeh Karimi, Michail Maniatakos, Abhijit Jas, Yiorgos Makris |
On the Correlation between Controller Faults and Instruction-Level Errors in Modern Microprocessors. |
ITC |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Armin Alaghi, Mahshid Sedghi, Naghmeh Karimi, Zainalabedin Navabi |
NoC Reconfiguration for Utilizing the Largest Fault-free Connected Sub-structure. |
ITC |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Armin Alaghi, Mahshid Sedghi, Naghmeh Karimi, Mahmood Fathy, Zainalabedin Navabi |
Reliable NoC architecture utilizing a robust rerouting algorithm. |
EWDTS |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Michail Maniatakos, Naghmeh Karimi, Yiorgos Makris, Abhijit Jas, Chandra Tirumurti |
Design and Evaluation of a Timestamp-Based Concurrent Error Detection Method (CED) in a Modern Microprocessor Controller. |
DFT |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Naghmeh Karimi, Soheil Aminzadeh, Saeed Safari, Zainalabedin Navabi |
A Novel GA-Based High-Level Synthesis Technique to Enhance RT-Level Concurrent Testing. |
IOLTS |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Naghmeh Karimi, Shahrzad Mirkhani, Zainalabedin Navabi, Fabrizio Lombardi |
RT level reliability enhancement by constructing dynamic TMRS. |
ACM Great Lakes Symposium on VLSI |
2007 |
DBLP DOI BibTeX RDF |
fault tolerant, reliability, TMR, RTL design |
| 1 | Armin Alaghi, Naghmeh Karimi, Mahshid Sedghi, Zainalabedin Navabi |
Online NoC Switch Fault Detection and Diagnosis Using a High Level Fault Mode. |
DFT |
2007 |
DBLP DOI BibTeX RDF |
|
Displaying result #1 - #14 of 14 (100 per page; Change: )
|
|
![[Valid RSS]](Pics/valid-rss.png "Validate my RSS feed")