| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Yu-Shen Yang, Andreas G. Veneris, Nicola Nicolici |
Automating Data Analysis and Acquisition Setup in a Silicon Debug Environment.  |
IEEE Trans. VLSI Syst.  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Yu-Shen Yang, Andreas G. Veneris, Nicola Nicolici, Masahiro Fujita |
Automated data analysis techniques for a modern silicon debug environment. |
ASP-DAC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Adam B. Kinsman, Nicola Nicolici |
Trade-Offs in Test Data Compression and Deterministic X-Masking of Responses. |
IEEE Trans. Computers |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Adam B. Kinsman, Nicola Nicolici |
Computational Vector-Magnitude-Based Range Determination for Scientific Abstract Data Types. |
IEEE Trans. Computers |
2011 |
DBLP DOI BibTeX RDF |
Bit-width allocation, hardware accelerators |
| 1 | Ehab Anis Daoud, Nicola Nicolici |
On Using Lossy Compression for Repeatable Experiments during Silicon Debug. |
IEEE Trans. Computers |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Adam B. Kinsman, Nicola Nicolici |
Automated Range and Precision Bit-Width Allocation for Iterative Computations. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Jason Thong, Nicola Nicolici |
An Optimal and Practical Approach to Single Constant Multiplication. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Adam B. Kinsman, Nicola Nicolici |
A VLSI Architecture and the FPGA Prototype for MPEG-2 Audio/Video Decoding. |
IEEE Trans. VLSI Syst. |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Ho Fai Ko, Adam B. Kinsman, Nicola Nicolici |
Design-for-Debug Architecture for Distributed Embedded Logic Analysis. |
IEEE Trans. VLSI Syst. |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Ehab Anis Daoud, Nicola Nicolici |
Embedded Debug Architecture for Bypassing Blocking Bugs During Post-Silicon Validation. |
IEEE Trans. VLSI Syst. |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | George A. Constantinides, Adam B. Kinsman, Nicola Nicolici |
Numerical Data Representations for FPGA-Based Scientific Computing. |
IEEE Design & Test of Computers |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | George A. Constantinides, Nicola Nicolici |
Guest Editors' Introduction: Surveying the Landscape of FPGA Accelerator Research. |
IEEE Design & Test of Computers |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Phillip Kinsman, Nicola Nicolici |
Dynamic binary translation to a reconfigurable target for on-the-fly acceleration. |
DAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Zahra Lak, Nicola Nicolici |
A New Algorithm for Post-Silicon Clock Measurement and Tuning. |
DFT |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Zahra Lak, Nicola Nicolici |
In-system and on-the-fly clock tuning mechanism to combat lifetime performance degradation. |
ICCAD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Adam B. Kinsman, Nicola Nicolici |
Bit-Width Allocation for Hardware Accelerators for Scientific Computing Using SAT-Modulo Theory. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Ramin Mafi, Shahin Sirouspour, Behzad Mahdavikhah, Brian Moody, Kaveh Elizeh, Adam B. Kinsman, Nicola Nicolici |
A Parallel Computing Platform for Real-Time Haptic Interaction with Deformable Bodies. |
IEEE T. Haptics |
2010 |
DBLP DOI BibTeX RDF |
Object deformation, FPGA, parallel computing, haptics, finite element method, hardware acceleration, real-time simulation |
| 1 | Adam B. Kinsman, Nicola Nicolici |
Time-Multiplexed Compressed Test of SOC Designs. |
IEEE Trans. VLSI Syst. |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Yu-Shen Yang, Brian Keng, Nicola Nicolici, Andreas G. Veneris, Sean Safarpour |
Automated silicon debug data analysis techniques for a hardware data acquisition environment. |
ISQED |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Ho Fai Ko, Nicola Nicolici |
Automated trace signals selection using the RTL descriptions. |
ITC |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Jason Thong, Nicola Nicolici |
A novel optimal single constant multiplication algorithm. |
DAC |
2010 |
DBLP DOI BibTeX RDF |
single constant multiplication, directed acyclic graphs, optimal algorithm, common subexpression elimination |
| 1 | Adam B. Kinsman, Nicola Nicolici |
Robust design methods for hardware accelerators for iterative algorithms in scientific computing. |
DAC |
2010 |
DBLP DOI BibTeX RDF |
bit-width allocation, satisfiability-modulo theory |
| 1 | Kaveh Elizeh, Nicola Nicolici |
Embedded memory binding in FPGAs. |
DAC |
2010 |
DBLP DOI BibTeX RDF |
FPGA, memory, binding |
| 1 | Subhasish Mitra, Sanjit A. Seshia, Nicola Nicolici |
Post-silicon validation opportunities, challenges and recent advances. |
DAC |
2010 |
DBLP DOI BibTeX RDF |
post-silicon validation |
| 1 | Ho Fai Ko, Nicola Nicolici |
Combining scan and trace buffers for enhancing real-time observability in post-silicon debugging. |
European Test Symposium |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Behzad Mahdavikhah, Ramin Mafi, Shahin Sirouspour, Nicola Nicolici |
Haptic rendering of deformable objects using a multiple FPGA parallel computing architecture. |
FPGA |
2010 |
DBLP DOI BibTeX RDF |
conjugate gradient (CG), finite-element modeling (FEM), field-programmable gate array (FPGA) |
| 1 | Jason Thong, Nicola Nicolici |
Combined optimal and heuristic approaches for multiple constant multiplication. |
ICCD |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Ho Fai Ko, Nicola Nicolici |
Algorithms for State Restoration and Trace-Signal Selection for Data Acquisition in Silicon Debug. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Jason Thong, Nicola Nicolici |
Time-Efficient Single Constant Multiplication Based on Overlapping Digit Patterns. |
IEEE Trans. VLSI Syst. |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Nicola Nicolici, Ho Fai Ko |
Design-for-debug for post-silicon validation: Can high-level descriptions help? |
HLDVT |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Brian C. Richards, Nicola Nicolici, Henry Chen, Kevin Chao, Robert Abiad, Dan Werthimer, Borivoje Nikolic |
A 1.5GS/s 4096-point digital spectrum analyzer for space-borne applications. |
CICC |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Ho Fai Ko, Nicola Nicolici |
Resource-Efficient Programmable Trigger Units for Post-Silicon Validation. |
European Test Symposium |
2009 |
DBLP DOI BibTeX RDF |
programmable trigger unit, false trigger analysis, post-silicon validation |
| 1 | Yu-Shen Yang, Nicola Nicolici, Andreas G. Veneris |
Automated data analysis solutions to silicon debug. |
DATE |
2009 |
DBLP BibTeX RDF |
|
| 1 | Adam B. Kinsman, Nicola Nicolici |
Finite Precision bit-width allocation using SAT-Modulo Theory. |
DATE |
2009 |
DBLP BibTeX RDF |
|
| 1 | Adam B. Kinsman, Nicola Nicolici |
Computational bit-width allocation for operations in vector calculus. |
ICCD |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Ho Fai Ko, Nicola Nicolici |
Automated Scan Chain Division for Reducing Shift and Capture Power During Broadside At-Speed Test. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Ho Fai Ko, Nicola Nicolici |
Scan Division Algorithm for Shift and Capture Power Reduction for At-Speed Test Using Skewed-Load Test Application Strategy. |
J. Electronic Testing |
2008 |
DBLP DOI BibTeX RDF |
Skewed-load, Scan division, At-speed test, Low-power test |
| 1 | Nicola Nicolici, Patrick Girard |
Guest Editorial. |
J. Electronic Testing |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Ho Fai Ko, Nicola Nicolici |
A Novel Automated Scan Chain Division Method for Shift and Capture Power Reduction in Broadside At-Speed Test. |
ISQED |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Adam B. Kinsman, Nicola Nicolici |
Embedded Deterministic Test Exploiting Care Bit Clustering and Seed Borrowing. |
ISQED |
2008 |
DBLP DOI BibTeX RDF |
design-for-testability, test data compression |
| 1 | Ho Fai Ko, Adam B. Kinsman, Nicola Nicolici |
Distributed Embedded Logic Analysis for Post-Silicon Validation of SOCs. |
ITC |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Ramin Mafi, Shahin Sirouspour, Brian Moody, Behzad Mahdavikhah, Kaveh Elizeh, Adam B. Kinsman, Nicola Nicolici, Mahyar Fotoohi, D. Madill |
Hardware-based parallel computing for real-time haptic rendering of deformable objects. |
IROS |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Ehab Anis Daoud, Nicola Nicolici |
On Bypassing Blocking Bugs during Post-Silicon Validation. |
European Test Symposium |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Ho Fai Ko, Nicola Nicolici |
On Automated Trigger Event Generation in Post-Silicon Validation. |
DATE |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Ho Fai Ko, Nicola Nicolici |
Automated Trace Signals Identification and State Restoration for Improving Observability in Post-Silicon Validation. |
DATE |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Dimitris Gizopoulos, Kaushik Roy, Patrick Girard, Nicola Nicolici, Xiaoqing Wen |
Power-Aware Testing and Test Strategies for Low Power Devices. |
DATE |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Qiang Xu, Nicola Nicolici, Krishnendu Chakrabarty |
Test Wrapper Design and Optimization Under Power Constraints for Embedded Cores With Multiple Clock Domains. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Erik Jan Marinissen, Nicola Nicolici |
Editorial Silicon Debug and Diagnosis. |
IET Computers & Digital Techniques |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Erik Jan Marinissen, Axel Jantsch, Nicola Nicolici |
DATE 07 workshop on diagnostic services in NoCs. |
IEEE Design & Test of Computers |
2007 |
DBLP DOI BibTeX RDF |
diagnostic services, DATE 2007, network on chip, NoC |
| 1 | Ehab Anis, Nicola Nicolici |
On using lossless compression of debug data in embedded logic analysis. |
ITC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Nicola Nicolici, Xiaoqing Wen |
Embedded Tutorial on Low Power Test. |
European Test Symposium |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Ehab Anis, Nicola Nicolici |
Interactive presentation: Low cost debug architecture using lossy compression for silicon debug. |
DATE |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Qiang Xu, Nicola Nicolici |
DFT Infrastructure for Broadside Two-Pattern Test of Core-Based SOCs. |
IEEE Trans. Computers |
2006 |
DBLP DOI BibTeX RDF |
embedded core delay test, System-on-a-chip |
| 1 | Qiang Xu, Nicola Nicolici |
Multifrequency TAM design for hierarchical SOCs. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Adam B. Kinsman, Scott Ollivierre, Nicola Nicolici |
Diagnosis of Logic Circuits Using Compressed Deterministic Data and On-Chip Response Comparison. |
IEEE Trans. VLSI Syst. |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Ho Fai Ko, Nicola Nicolici |
RTL Scan Design for Skewed-Load At-speed Test under Power Constraints. |
ICCD |
2006 |
DBLP BibTeX RDF |
|
| 1 | Qiang Xu, Nicola Nicolici |
Modular SOC testing with reduced wrapper count. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Paul Theo Gonciari, Bashir M. Al-Hashimi, Nicola Nicolici |
Synchronization overhead in SOC compressed test. |
IEEE Trans. VLSI Syst. |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Qiang Xu, Nicola Nicolici |
Wrapper design for multifrequency IP cores. |
IEEE Trans. VLSI Syst. |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Qiang Xu, Nicola Nicolici |
Modular and rapid testing of SOCs with unwrapped logic blocks. |
IEEE Trans. VLSI Syst. |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Qiang Xu, Nicola Nicolici |
On concurrent test of wrapped cores and unwrapped logic blocks in SOCs. |
ITC |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Qiang Xu, Nicola Nicolici, Krishnendu Chakrabarty |
Multi-frequency wrapper design and optimization for embedded cores under average power constraints. |
DAC |
2005 |
DBLP DOI BibTeX RDF |
scan control unit, wrapper design, multiple clock domains |
| 1 | Ho Fai Ko, Qiang Xu, Nicola Nicolici |
Register-transfer level functional scan for hierarchical designs. |
ASP-DAC |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Paul M. Rosinger, Bashir M. Al-Hashimi, Nicola Nicolici |
Scan architecture with mutually exclusive scan segment activation for shift- and capture-power reduction. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Nicola Nicolici, Bashir M. Al-Hashimi |
Testability Trade-Offs for BIST Data Paths. |
J. Electronic Testing |
2004 |
DBLP DOI BibTeX RDF |
power-constrained test, BIST |
| 1 | Qiang Xu, Nicola Nicolici |
Time/Area Tradeoffs in Testing Hierarchical SOCs With Hard Mega-Cores. |
ITC |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Ho Fai Ko, Nicola Nicolici |
Functional Scan Chain Design at RTL for Skewed-Load Delay Fault Testing. |
Asian Test Symposium |
2004 |
DBLP DOI BibTeX RDF |
High-level DFT, Delay-fault testing |
| 1 | Qiang Xu, Nicola Nicolici |
Multi-Frequency Test Access Mechanism Design for Modular SOC Testing. |
Asian Test Symposium |
2004 |
DBLP DOI BibTeX RDF |
Multi-frequency Virtual TAM, SOC testing |
| 1 | Qiang Xu, Nicola Nicolici |
Wrapper Design for Testing IP Cores with Multiple Clock Domains. |
DATE |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Ho Fai Ko, Nicola Nicolici |
Functional Illinois Scan Design at RTL. |
ICCD |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Scott Ollivierre, Adam B. Kinsman, Nicola Nicolici |
Compressed Embedded Diagnosis of Logic Cores. |
ICCD |
2004 |
DBLP DOI BibTeX RDF |
Built-In Diagnosis, Test Data Compression |
| 1 | Paul Theo Gonciari, Bashir M. Al-Hashimi, Nicola Nicolici |
Variable-length input Huffman coding for system-on-a-chip test. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Paul Theo Gonciari, Bashir M. Al-Hashimi, Nicola Nicolici |
Addressing useless test data in core-based system-on-a-chip test. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Nicola Nicolici, Bashir M. Al-Hashimi |
Power-Conscious Test Synthesis and Scheduling. |
IEEE Design & Test of Computers |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Qiang Xu, Nicola Nicolici |
On Reducing Wrapper Boundary Register Cells in Modular SOC Testing. |
ITC |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Paul Theo Gonciari, Bashir M. Al-Hashimi, Nicola Nicolici |
Test Data Compression: The System Integrator's Perspective. |
DATE |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Qiang Xu, Nicola Nicolici |
Delay Fault Testing of Core-Based Systems-on-a-Chi. |
DATE |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Adam B. Kinsman, Jonathan I. Hewitt, Nicola Nicolici |
Embedded Compact Deterministic Test for IP-Protected Cores. |
DFT |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Bai Hong Fang, Nicola Nicolici |
Power-Constrained Embedded Memory BIST Architecture. |
DFT |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Bai Hong Fang, Qiang Xu, Nicola Nicolici |
Hardware/Software Co-testing of Embedded Memories in Complex SOCs. |
ICCAD |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Nicola Nicolici, Bashir M. Al-Hashimi |
Multiple Scan Chains for Power Minimization during Test Application in Sequential Circuits. |
IEEE Trans. Computers |
2002 |
DBLP DOI BibTeX RDF |
Digital systems testing, design for test, low power circuits |
| 1 | Paul M. Rosinger, Bashir M. Al-Hashimi, Nicola Nicolici |
Power profile manipulation: a new approach for reducing test application time under power constraints. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Paul Theo Gonciari, Bashir M. Al-Hashimi, Nicola Nicolici |
Integrated Test Data Decompression and Core Wrapper Design for Low-Cost System-on-a-Chip Testing. |
ITC |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Paul Theo Gonciari, Bashir M. Al-Hashimi, Nicola Nicolici |
Useless Memory Allocation in System-on-a-Chip Test: Problems and Solutions. |
VTS |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Paul Theo Gonciari, Bashir M. Al-Hashimi, Nicola Nicolici |
Improving Compression Ratio, Area Overhead, and Test Application Time for System-on-a-Chip Test Data Compression/Decompression. |
DATE |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Paul M. Rosinger, Bashir M. Al-Hashimi, Nicola Nicolici |
Scan Architecture for Shift and Capture Cycle Power Reduction. (PDF / PS) |
DFT |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Paul M. Rosinger, Bashir M. Al-Hashimi, Nicola Nicolici |
Low Power Mixed-Mode BIST Based on Mask Pattern Generation Using Dual LFSR Re-Seeding. |
ICCD |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Nicola Nicolici, Bashir M. Al-Hashimi |
Tackling test trade-offs for BIST RTL data paths: BIST area overhead, test application time and power dissipation. |
ITC |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Nicola Nicolici, Bashir M. Al-Hashimi |
Testability trade-offs for BIST RTL data paths: the case for three dimensional design space. |
DATE |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Paul M. Rosinger, Bashir M. Al-Hashimi, Nicola Nicolici |
Power constrained test scheduling using power profile manipulation. |
ISCAS |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Nicola Nicolici, Bashir M. Al-Hashimi, Andrew D. Brown, Alan Christopher Williams |
BIST hardware synthesis for RTL data paths based on testcompatibility classes. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Nicola Nicolici, Bashir M. Al-Hashimi |
Power conscious test synthesis and scheduling for BIST RTL data paths. |
ITC |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Nicola Nicolici, Bashir M. Al-Hashimi |
Scan Latch Partitioning into Multiple Scan Chains for Power Minimization in Full Scan Sequential Circuits. |
DATE |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Nicola Nicolici, Bashir M. Al-Hashimi |
Efficient BIST Hardware Insertion with Low Test Application Time for Synthesized Data Paths. |
DATE |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Nicola Nicolici, Bashir M. Al-Hashimi |
Correction to the Proof of Theorem 2 in ``Parallel Signature Analysis Design with Bounds on Aliasing. |
IEEE Trans. Computers |
1998 |
DBLP DOI BibTeX RDF |
|
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