Search results for "Nikhil Jayakumar"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Ayan Mandal, Nikhil Jayakumar, Kalyana C. Bollapalli, Sunil P. Khatri, Rabi N. Mahapatra	An Automated Approach for Minimum Jitter Buffered H-Tree Construction.	VLSI Design	2011	DBLP DOI BibTeX RDF
1	Nikhil Jayakumar, Sunil P. Khatri	A Simultaneous Input Vector Control and Circuit Modification Technique to Reduce Leakage with Zero Delay Penalty.	ACM Trans. Design Autom. Electr. Syst.	2010	DBLP DOI BibTeX RDF
1	Suganth Paul, Nikhil Jayakumar, Sunil P. Khatri	A Fast Hardware Approach for Approximate, Efficient Logarithm and Antilogarithm Computations.	IEEE Trans. VLSI Syst.	2009	DBLP DOI BibTeX RDF
1	Rajesh Garg, Nikhil Jayakumar, Sunil P. Khatri, Gwan S. Choi	Circuit-Level Design Approaches for Radiation-Hard Digital Electronics.	IEEE Trans. VLSI Syst.	2009	DBLP DOI BibTeX RDF
1	A. Kapoor, Nikhil Jayakumar, Sunil P. Khatri	Dynamically De-Skewable Clock Distribution Methodology.	IEEE Trans. VLSI Syst.	2008	DBLP DOI BibTeX RDF
1	Kanupriya Gulati, Nikhil Jayakumar, Sunil P. Khatri, D. M. H. Walker	A probabilistic method to determine the minimum leakage vector for combinational designs in the presence of random PVT variations.	Integration	2008	DBLP DOI BibTeX RDF
1	Nikhil Jayakumar, Sunil P. Khatri	A Predictably Low-Leakage ASIC Design Style.	IEEE Trans. VLSI Syst.	2007	DBLP DOI BibTeX RDF
1	Vijay Nagarajan, Stefan Laendner, Nikhil Jayakumar, Olgica Milenkovic, Sunil P. Khatri	High-throughput VLSI Implementations of Iterative Decoders and Related Code Construction Problems.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	code construction, fully-parallel VLSI implementation, network of PLAs, iterative decoding, low-density parity-check codes
1	Nikhil Jayakumar, Sunil P. Khatri	An algorithm to minimize leakage through simultaneous input vector control and circuit modification.	DATE	2007	DBLP DOI BibTeX RDF
1	Kanupriya Gulati, Nikhil Jayakumar, Sunil P. Khatri	A Structured ASIC Design Approach Using Pass Transistor Logic.	ISCAS	2007	DBLP DOI BibTeX RDF
1	Rajesh Garg, Mario Sanchez, Kanupriya Gulati, Nikhil Jayakumar, Anshul Gupta, Sunil P. Khatri	A design flow to optimize circuit delay by using standard cells and PLAs.	ACM Great Lakes Symposium on VLSI	2006	DBLP DOI BibTeX RDF	PLA, standard cell
1	Nikhil Jayakumar, Rajesh Garg, Bruce Gamache, Sunil P. Khatri	A PLA based asynchronous micropipelining approach for subthreshold circuit design.	DAC	2006	DBLP DOI BibTeX RDF	micro-pipelining, asynchronous, PLA, sub-threshold
1	Rajesh Garg, Nikhil Jayakumar, Sunil P. Khatri, Gwan Choi	A design approach for radiation-hard digital electronics.	DAC	2006	DBLP DOI BibTeX RDF	radiation-hard, SEU
1	Kanupriya Gulati, Nikhil Jayakumar, Sunil P. Khatri	A probabilistic method to determine the minimum leakage vector for combinational designs.	ISCAS	2006	DBLP DOI BibTeX RDF
1	Nikhil Jayakumar, Sunil P. Khatri, Kanupriya Gulati, Alexander Sprintson	Network coding for routability improvement in VLSI.	ICCAD	2006	DBLP DOI BibTeX RDF
1	Rajesh Garg, Nikhil Jayakumar, Sunil P. Khatri	On the Improvement of Statistical Static Timing Analysis.	ICCD	2006	DBLP BibTeX RDF
1	Kanupriya Gulati, Nikhil Jayakumar, Sunil P. Khatri	An algebraic decision diagram (ADD) based technique to find leakage histograms of combinational designs.	ISLPED	2005	DBLP DOI BibTeX RDF	BDD, leakage, ADD
1	Nikhil Jayakumar, Sandeep Dhar, Sunil P. Khatri	A self-adjusting scheme to determine the optimum RBB by monitoring leakage currents.	DAC	2005	DBLP DOI BibTeX RDF	leakage power, self-adjusting, body-biasing
1	Nikhil Jayakumar, Sunil P. Khatri	A variation tolerant subthreshold design approach.	DAC	2005	DBLP DOI BibTeX RDF	variation-toleran, self-adjusting, body-biasing, sub-threshold
1	Edward Hursey, Nikhil Jayakumar, Sunil P. Khatri	Non-Manhattan Routing Using a Manhattan Router.	VLSI Design	2005	DBLP DOI BibTeX RDF
1	Ganesh Venkataraman, Nikhil Jayakumar, Jiang Hu, Peng Li, Sunil P. Khatri, Anand Rajaram, Patrick McGuinness, Charles J. Alpert	Practical techniques to reduce skew and its variations in buffered clock networks.	ICCAD	2005	DBLP BibTeX RDF
1	Seraj Ahmad, Nikhil Jayakumar, Vijay Balasubramanian, Edward Hursey, Sunil P. Khatri, Rabi N. Mahapatra	X-Routing using Two Manhattan Route Instances.	ICCD	2005	DBLP DOI BibTeX RDF
1	Nikhil Jayakumar, Sunil P. Khatri	Minimum Energy Near-threshold Network of PLA based Design.	ICCD	2005	DBLP DOI BibTeX RDF
1	A. Kapoor, Nikhil Jayakumar, Sunil P. Khatri	A novel clock distribution and dynamic de-skewing methodology.	ICCAD	2004	DBLP DOI BibTeX RDF
1	Nikhil Jayakumar, Sunil P. Khatri	A metal and via maskset programmable VLSI design methodology using PLAs.	ICCAD	2004	DBLP DOI BibTeX RDF
1	Nikhil Jayakumar, Sunil P. Khatri	An ASIC design methodology with predictably low leakage, using leakage-immune standard cells.	ISLPED	2003	DBLP DOI BibTeX RDF	standby current, leakage current, standard cells, MTCMOS
1	Nikhil Jayakumar, Mitra Purandare, Fabio Somenzi	Dos and don'ts of CTL state coverage estimation.	DAC	2003	DBLP DOI BibTeX RDF	vacuity detection, model checking, state coverage

Publications of "Nikhil Jayakumar" ( http://dblp.L3S.de/Authors/Nikhil_Jayakumar )