Search results for "Nitin Chandrachoodan"

Found 14 publication records. Showing 14 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link
1	Manish Kumar Jaiswal, Nitin Chandrachoodan	FPGA-Based High-Performance and Scalable Block LU Decomposition Architecture.	IEEE Trans. Computers	2012	DBLP DOI BibTeX RDF
1	Dhiraj Reddy Nallapa Yoge, Nitin Chandrachoodan	GPU Implementation of a Programmable Turbo Decoder for Software Defined Radio Applications.	VLSI Design	2012	DBLP DOI BibTeX RDF
1	Nitin Chandrachoodan, Shankar Balachandran	24th "IEEE International Conference on VLSI Design" Chennai, India, 2-7 January 2011.	J. Low Power Electronics	2011	DBLP BibTeX RDF
1	Seetal Potluri, Nitin Chandrachoodan, V. Kamakoti	Post-Synthesis Circuit Techniques for Runtime Leakage Reduction.	ISVLSI	2011	DBLP DOI BibTeX RDF
1	Manish Kumar Jaiswal, Nitin Chandrachoodan	Efficient Implementation of Floating-Point Reciprocator on FPGA.	VLSI Design	2009	DBLP DOI BibTeX RDF
1	Aman Kokrady, C. P. Ravikumar, Nitin Chandrachoodan	Memory Yield Improvement through Multiple Test Sequences and Application-Aware Fault Models.	VLSI Design	2008	DBLP DOI BibTeX RDF
1	Karthick Parashar, Nitin Chandrachoodan	A Novel Event Based Simulation Algorithm for Sequential Digital Circuit Simulation.	FPL	2007	DBLP DOI BibTeX RDF
1	Kannan Gaddam, Nitin Chandrachoodan, S. Srinivasan	Rapid Abstract Control Model for Signal Processing Implementation.	SiPS	2007	DBLP DOI BibTeX RDF
1	Nitin Chandrachoodan, Shuvra S. Bhattacharyya, K. J. Ray Liu	The hierarchical timing pair model for multirate DSP applications.	IEEE Transactions on Signal Processing	2004	DBLP DOI BibTeX RDF
1	Arun Raghupathy, Nitin Chandrachoodan, K. J. Ray Liu	Algorithm and VLSI architecture for high performance adaptive video scaling.	IEEE Transactions on Multimedia	2003	DBLP DOI BibTeX RDF
1	Nitin Chandrachoodan, Shuvra S. Bhattacharyya, K. J. Ray Liu	High-Level Synthesis of DSP Applications Using Adaptive Negative Cycle Detection.	EURASIP J. Adv. Sig. Proc.	2002	DBLP DOI BibTeX RDF
1	Nitin Chandrachoodan, Shuvra S. Bhattacharyya, K. J. Ray Liu	Adaptive negative cycle detection in dynamic graphs.	ISCAS	2001	DBLP DOI BibTeX RDF
1	Nitin Chandrachoodan, Shuvra S. Bhattacharyya, K. J. Ray Liu	The hierarchical timing pair model.	ISCAS	2001	DBLP DOI BibTeX RDF
1	Arun Raghupathy, Pohsiang Hsu, K. J. Ray Liu, Nitin Chandrachoodan	VLSI architecture and design for high performance adaptive video scaling.	ISCAS	1999	DBLP DOI BibTeX RDF

Publications of "Nitin Chandrachoodan" ( http://dblp.L3S.de/Authors/Nitin_Chandrachoodan )