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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 8 occurrences of 7 keywords
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Results
Found 11 publication records. Showing 11 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Mame Maria Mbaye, Normand Bélanger, Yvon Savaria, Samuel Pierre |
Loop Acceleration Exploration for ASIP Architecture.  |
IEEE Trans. VLSI Syst.  |
2012 |
DBLP DOI BibTeX RDF |
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| 1 | Syed Rafay Hasan, Normand Bélanger, Yvon Savaria, M. Omair Ahmad |
All digital skew tolerant synchronous interfacing methods for high-performance point-to-point communications in deep sub-micron SoCs. |
Integration |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Gilbert Kowarzyk, Normand Bélanger, Yvon Savaria |
A GPGPU-based software implementation of the PBDI deinterlacing algorithm. |
ICECS |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Syed Rafay Hasan, Normand Bélanger, Yvon Savaria, M. Omair Ahmad |
Crosstalk Glitch Propagation Modeling for Asynchronous Interfaces in Globally Asynchronous Locally Synchronous Systems. |
IEEE Trans. on Circuits and Systems |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Syed Rafay Hasan, Normand Bélanger, Yvon Savaria, M. Omair Ahmad |
Crosstalk-Glitch Gating: A Solution for Designing Glitch-Tolerant Asynchronous Handshake Interface Mechanisms for GALS Systems. |
IEEE Trans. on Circuits and Systems |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Nicolas Beucher, Normand Bélanger, Yvon Savaria, Guy Bois |
High Acceleration for Video Processing Applications Using Specialized Instruction Set Based on Parallelism and Data Reuse. |
Signal Processing Systems |
2009 |
DBLP DOI BibTeX RDF |
ASIP, Acceleration, Video processing, Data reuse |
| 1 | Maria Mbaye, Normand Bélanger, Yvon Savaria, Samuel Pierre |
Loop-oriented metrics for exploring an application-specific architecture design-space. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Mame Maria Mbaye, Normand Bélanger, Yvon Savaria, Samuel Pierre |
A Novel Application-specific Instruction-set Processor Design Approach for Video Processing Acceleration. |
VLSI Signal Processing |
2007 |
DBLP DOI BibTeX RDF |
data grouping and reuse, optimization, parallelism, application-specific instruction-set processor, design exploration |
| 1 | Nicolas Beucher, Normand Bélanger, Yvon Savaria, Guy Bois |
Motion Compensated Frame Rate Conversion Using a Specialized Instruction Set Processor. |
SiPS |
2006 |
DBLP DOI BibTeX RDF |
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| 1 | Maria Mbaye, D. Lebel, Normand Bélanger, Yvon Savaria, Samuel Pierre |
Design exploration with an application-specific instruction-set processor for ELA deinterlacing. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
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| 1 | Maria Mbaye, Normand Bélanger, Yvon Savaria, Samuel Pierre |
Application specific instruction-set processor generation for video processing based on loop optimization. |
ISCAS |
2005 |
DBLP DOI BibTeX RDF |
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Displaying result #1 - #11 of 11 (100 per page; Change: )
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