| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Mahdi Shabany, P. Glenn Gulak |
A 675 Mbps, 4 $\times$ 4 64-QAM K-Best MIMO Detector in 0.13 $\mu{\rm m}$ CMOS.  |
IEEE Trans. VLSI Syst.  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Derek Ho, P. Glenn Gulak, Roman Genov |
CMOS field-modulated color sensor. |
CICC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Ameer Youssef, Mahdi Shabany, P. Glenn Gulak |
Performance analysis of lattice-reduction algorithms for a novel LR-compatible K-Best MIMO detector. |
ISCAS |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Ritu Raj Singh, Derek Ho, Alireza Nilchi, P. Glenn Gulak, Patrick Yau, Roman Genov |
A CMOS/Thin-Film Fluorescence Contact Imaging Microsystem for DNA Analysis. |
IEEE Trans. on Circuits and Systems |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Dimpesh Patel, Vadim Smolyakov, Mahdi Shabany, P. Glenn Gulak |
VLSI implementation of a WiMAX/LTE compliant low-complexity high-throughput soft-output K-Best MIMO detector. |
ISCAS |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Ameer Youssef, Mahdi Shabany, P. Glenn Gulak |
VLSI implementation of a hardware-optimized lattice reduction algorithm for WiMAX/LTE MIMO detection. |
ISCAS |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Mahdi Shabany, P. Glenn Gulak |
A 0.13µm CMOS 655Mb/s 4×4 64-QAM K-Best MIMO detector. |
ISSCC |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Ritu Raj Singh, Derek Ho, Alireza Nilchi, Roman Genov, P. Glenn Gulak |
A Hybrid Thin-film/CMOS Fluorescence Contact Imager. |
ISCAS |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Dimpesh Patel, Mahdi Shabany, P. Glenn Gulak |
A Low-complexity High-speed QR Decomposition Implementation for MIMO Receivers. |
ISCAS |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Mahdi Shabany, P. Glenn Gulak |
Efficient Compensation of the Nonlinearity of Solid-State Power Amplifiers Using Adaptive Sequential Monte Carlo Methods. |
IEEE Trans. on Circuits and Systems |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Mahdi Shabany, Krishna Su, P. Glenn Gulak |
A pipelined scalable high-throughput implementation of a near-ML K-best complex lattice decoder. |
ICASSP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Mahdi Shabany, P. Glenn Gulak |
A systolic architecture of a Sequential Monte Carlo-based equalizer for frequency-selective MIMO channels. |
SiPS |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Mahdi Shabany, P. Glenn Gulak |
Scalable VLSI architecture for K-best lattice decoders. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Mahdi Shabany, P. Glenn Gulak |
The application of lattice-reduction to the K-Best algorithm for near-optimal MIMO detection. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Warren J. Gross, Frank R. Kschischang, P. Glenn Gulak |
Architecture and Implementation of an Interpolation Processor for Soft-Decision Reed-Solomon Decoding. |
IEEE Trans. VLSI Syst. |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Mahdi Shabany, P. Glenn Gulak |
Application of Sequential Monte Carlo to M-QAM Schemes in the Presence of Nonlinear Solid-State Power Amplifiers. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Warren J. Gross, Frank R. Kschischang, Ralf Koetter, P. Glenn Gulak |
Applications of Algebraic Soft-Decision Decoding of Reed-Solomon Codes. |
IEEE Transactions on Communications |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Warren J. Gross, Frank R. Kschischang, Ralf Koetter, P. Glenn Gulak |
Applications of Algebraic Soft-Decision Decoding of Reed-Solomon Codes. |
IEEE Transactions on Communications |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Y. Eslami, Ali Sheikholeslami, P. Glenn Gulak, S. Masui, K. Mukaida |
An area-efficient universal cryptography processor for smart cards. |
IEEE Trans. VLSI Syst. |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Mahdi Shabany, P. Glenn Gulak |
An efficient architecture for distributed resampling for high-speed particle filtering. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Mahdi Shabany, P. Glenn Gulak |
VLSI implementation of a sequential Monte Carlo receiver. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Warren J. Gross, Frank R. Kschischang, Ralf Koetter, P. Glenn Gulak |
Towards a VLSI Architecture for Interpolation-Based Soft-Decision Reed-Solomon Decoders. |
VLSI Signal Processing |
2005 |
DBLP DOI BibTeX RDF |
Reed-Solomon decoders, Sudan's algorithm, Guruswami-Sudan algorithm, Koetter-Vardy algorithm, Hasse derivative, VLSI architectures, list decoding, polynomial interpolation, soft-decision decoding |
| 1 | David Gnaedig, Emmanuel Boutillon, Michel Jézéquel, Vincent C. Gaudet, P. Glenn Gulak |
On Multiple Slice Turbo Codes. |
Annales des Télécommunications |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Warren J. Gross, Frank R. Kschischang, P. Glenn Gulak |
An FPGA Interpolation Processor for Soft-Decision Reed-Solomon Decoding. |
FCCM |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Emmanuel Boutillon, Warren J. Gross, P. Glenn Gulak |
VLSI architectures for the MAP algorithm. |
IEEE Transactions on Communications |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Tooraj Esmailian, Frank R. Kschischang, P. Glenn Gulak |
In-building power lines as high-speed communication channels: channel characterization and a test channel ensemble. |
Int. J. Communication Systems |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Vincent C. Gaudet, P. Glenn Gulak |
Implementation Issues for High-Bandwidth Field-Programmable Analog Arrays. |
Journal of Circuits, Systems, and Computers |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Kerry S. Lowe, P. Glenn Gulak |
A joint gate sizing and buffer insertion method for optimizing delay and power in CMOS and BiCMOS combinational logic. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | P. Glenn Gulak |
A Review of Multiple-Valued Memory Technology. (PDF / PS) |
ISMVL |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Ali Sheikholeslami, R. Yoshimura, P. Glenn Gulak |
Look-up Tables (LUTs) for Multiple-Valued, Combinational Logic. (PDF / PS) |
ISMVL |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Kenneth J. Schultz, P. Glenn Gulak |
Physical performance limits for shared buffer ATM switches. |
IEEE Transactions on Communications |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Kenneth J. Schultz, P. Glenn Gulak |
Authors' reply to "A note on architectures for large-capacity CAMs". |
Integration |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Kenneth J. Schultz, P. Glenn Gulak |
Multicast contention resolution with single-cycle windowing using content addressable FIFO's. |
IEEE/ACM Trans. Netw. |
1996 |
DBLP DOI BibTeX RDF |
|
| 1 | Ali Sheikholeslami, P. Glenn Gulak, Takahiro Hanyu |
A Multiple-Valued Ferroelectric Content-Addressable Memory. (PDF / PS) |
ISMVL |
1996 |
DBLP DOI BibTeX RDF |
ferroelectric, nonvolatile, memory, associative, CAM, content-addressable, multiple-valued |
| 1 | Kenneth J. Schultz, P. Glenn Gulak |
Architectures for large-capacity CAMs. |
Integration |
1995 |
DBLP DOI BibTeX RDF |
|
| 1 | Paul Chow, P. Glenn Gulak |
A Field-Programmable Mixed-Analog-Digital Array. |
FPGA |
1995 |
DBLP DOI BibTeX RDF |
|
| 1 | Gennady Feygin, P. Glenn Gulak, Paul Chow |
Minimizing Excess Code Length and VLSI Complexity in the Multiplication Free Approximation of Arithmetic Coding. |
Inf. Process. Manage. |
1994 |
DBLP DOI BibTeX RDF |
|
| 1 | Kerry S. Lowe, P. Glenn Gulak |
A unified discrete gate sizing/cell library optimization method for design and analysis of delay minimized CMOS and BiCMOS circuits. |
EURO-DAC |
1994 |
DBLP DOI BibTeX RDF |
|
| 1 | Gennady Feygin, P. Glenn Gulak, Paul Chow |
Architectural Advances in the VLSI Implementation of Arithmetic Coding for Binary Image Compression. |
Data Compression Conference |
1994 |
DBLP DOI BibTeX RDF |
|
| 1 | Gennady Feygin, Paul Chow, P. Glenn Gulak, John Chappel, Grant Goodes, Oswin Hall, Ahmad Sayes, Satwant Singh, Michael B. Smith, Steven J. E. Wilton |
A VLSI Implementation of a Cascade Viterbi Decoder with Traceback. |
ISCAS |
1993 |
DBLP BibTeX RDF |
|
| 1 | Kenneth J. Schultz, P. Glenn Gulak |
A Logic-enhanced Memory for Digital Data Recovery Circuits. |
ISCAS |
1993 |
DBLP BibTeX RDF |
|
| 1 | Gennady Feygin, P. Glenn Gulak, Paul Chow |
Minimizing Error and VLSI Complexity in the Multiplication-Free Approximation of Arithmetic Coding. |
Data Compression Conference |
1993 |
DBLP DOI BibTeX RDF |
|
| 1 | Kerry S. Lowe, P. Glenn Gulak |
Gate sizing and buffer insertion for optimizing performance in power constrained BiCMOS circuits. |
ICCAD |
1993 |
DBLP DOI BibTeX RDF |
|
| 1 | Edward K. F. Lee, P. Glenn Gulak |
Dynamic Current-Mode Multi-Valued MOS Memory with Error Correction. |
ISMVL |
1992 |
DBLP BibTeX RDF |
|
| 1 | Howard C. Card, P. Glenn Gulak, Robert D. McLeod, Werner Pries |
(lambda, T) Complexity Measures for VLSI Computations in Constant Chip Area. |
IEEE Trans. Computers |
1987 |
DBLP DOI BibTeX RDF |
|
| 1 | Gregory E. Bridges, Werner Pries, Robert D. McLeod, M. Yunik, P. Glenn Gulak, Howard C. Card |
Dual Systolic Architectures for VLSI Digital Signal Processing Systems. |
IEEE Trans. Computers |
1986 |
DBLP DOI BibTeX RDF |
matrix multiplication algorithms, VLSI, parallel computation, Logic design, systolic architectures |
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