Search results for "Paul Marchal"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Herman Oprins, A. Srinivasan, Miroslav Cupák, Vladimir Cherman, Cristina Torregiani, Michele Stucchi, Geert Van der Plas, Paul Marchal, Bart Vandevelde, E. Cheng	Fine grain thermal modeling and experimental validation of 3D-ICs.	Microelectronics Journal	2011	DBLP DOI BibTeX RDF
1	Geert Van der Plas, Paresh Limaye, Igor Loi, Abdelkarim Mercha, Herman Oprins, Cristina Torregiani, Steven Thijs, Dimitri Linten, Michele Stucchi, Guruprasad Katti, Dimitrios Velenis, Vladimir Cherman, Bart Vandevelde, Veerle Simons, Ingrid De Wolf, Riet Labie, Dan Perry, Stephane Bronckers, Nikolaos Minas, Miro Cupac, Wouter Ruythooren, Jan Van Olmen, Alain Phommahaxay, Muriel de Potter de ten Broeck, Ann Opdebeeck, Michal Rakowski, Bart De Wachter, Morin Dehan, Marc Nelis, Rahul Agarwal, Antonio Pullini, Federico Angiolini, Luca Benini, Wim Dehaene, Youssef Travaly, Eric Beyne, Paul Marchal	Design Issues and Considerations for Low-Cost 3-D TSV IC Technology.	J. Solid-State Circuits	2011	DBLP DOI BibTeX RDF
1	Dragomir Milojevic, Herman Oprins, Julien Ryckaert, Paul Marchal, Geert Van der Plas	DRAM-on-logic Stack - Calibrated thermal and mechanical models integrated into PathFinding flow.	CICC	2011	DBLP DOI BibTeX RDF
1	Yuan Xie, Pol Marchal	Editorial- three-dimensional integrated circuits design.	IET Computers & Digital Techniques	2011	DBLP DOI BibTeX RDF
1	Eric Beyne, Pol Marchal, Geert Van der Plas	3D heterogeneous system integration: application driver for 3D technology development.	DAC	2011	DBLP DOI BibTeX RDF
1	Geert Van der Plas, Steven Thijs, Dimitri Linten, Guruprasad Katti, Paresh Limaye, Abdelkarim Mercha, Michele Stucchi, Herman Oprins, Bart Vandevelde, Nikolaos Minas, Miro Cupac, Morin Dehan, Marc Nelis, Rahul Agarwal, Wim Dehaene, Youssef Travaly, Eric Beyne, Paul Marchal	Verifying electrical/thermal/thermo-mechanical behavior of a 3D stack - Challenges and solutions.	CICC	2010	DBLP DOI BibTeX RDF
1	Marco Facchini, Paul Marchal, Francky Catthoor, Wim Dehaene	An RDL-configurable 3D memory tier to replace on-chip SRAM.	DATE	2010	DBLP BibTeX RDF
1	Samta Bansal, Juan C. Rey, Andrew Yang, Myung-Soo Jang, L. C. Lu, Philippe Magarshack, Pol Marchal, Riko Radojcic	3-D stacked die: now or future?	DAC	2010	DBLP DOI BibTeX RDF	integrated circuits, 3-D
1	Geert Van der Plas, Paresh Limaye, Abdelkarim Mercha, Herman Oprins, Cristina Torregiani, Steven Thijs, Dimitri Linten, Michele Stucchi, Guruprasad Katti, Dimitrios Velenis, Domae Shinichi, Vladimir Cherman, Bart Vandevelde, Veerle Simons, Ingrid De Wolf, Riet Labie, Dan Perry, Stephane Bronckers, Nikolaos Minas, Miro Cupac, Wouter Ruythooren, Jan Van Olmen, Alain Phommahaxay, Muriel de Potter de ten Broeck, Ann Opdebeeck, Michal Rakowski, Bart De Wachter, Morin Dehan, Marc Nelis, Rahul Agarwal, Wim Dehaene, Youssef Travaly, Pol Marchal, Eric Beyne	Design issues and considerations for low-cost 3D TSV IC technology.	ISSCC	2010	DBLP DOI BibTeX RDF
1	Igor Loi, Pol Marchal, Antonio Pullini, Luca Benini	3D NoCs - Unifying inter & intra chip communication.	ISCAS	2010	DBLP DOI BibTeX RDF
1	Nikolaos Minas, Ingrid De Wolf, Erik Jan Marinissen, Michele Stucchi, Herman Oprins, Abdelkarim Mercha, Geert Van der Plas, Dimitrios Velenis, Pol Marchal	3D integration: Circuit design, test, and reliability challenges.	IOLTS	2010	DBLP DOI BibTeX RDF
1	Marco Facchini, Trevor Carlson, Anselme Vignon, Martin Palkovic, Francky Catthoor, Wim Dehaene, Luca Benini, Paul Marchal	System-level power/performance evaluation of 3D stacked DRAMs for mobile applications.	DATE	2009	DBLP BibTeX RDF
1	Dragomir Milojevic, Trevor Carlson, Kris Croes, Riko Radojcic, Diana F. Ragett, Dirk Seynhaeve, Federico Angiolini, Geert Van der Plas, Paul Marchal	Automated Pathfinding tool chain for 3D-stacked integrated circuits: Practical case study.	3DIC	2009	DBLP DOI BibTeX RDF
1	Panagiotis Asimakopoulos, Geert Van der Plas, Alexandre Yakovlev, Paul Marchal	Evaluation of energy-recovering interconnects for low-power 3D stacked ICs.	3DIC	2009	DBLP DOI BibTeX RDF
1	Anselme Vignon, Stefan Cosemans, Wim Dehaene, Pol Marchal, Marco Facchini	A novel DRAM architecture as a low leakage alternative for SRAM caches in a 3D interconnect context.	DATE	2009	DBLP BibTeX RDF
1	Giacomo Paci, A. Nackaerts, Francky Catthoor, Luca Benini, Paul Marchal	How to Live with Uncertainties: Exploiting the Performance Benefits of Self-Timed Logic In Synchronous Design.	DSD	2008	DBLP DOI BibTeX RDF
1	Bruno Bougard, Paul Marchal, Luca Benini, Doris Keitel-Schulz, N. Checka	HOT TOPIC - 3D Integration or How to Scale in the 21st Century.	DATE	2008	DBLP DOI BibTeX RDF
1	Giacomo Paci, Francesco Poletti, Luca Benini, Paul Marchal	Exploring temperature-aware design in low-power MPSoCs.	IJES	2007	DBLP DOI BibTeX RDF
1	Giacomo Paci, Paul Marchal, Luca Benini	Exploration of Low Power Adders for a SIMD Data Path.	ASP-DAC	2007	DBLP DOI BibTeX RDF	SIMD data path, low power adders
1	Francesco Poletti, Antonio Poggiali, Davide Bertozzi, Luca Benini, Pol Marchal, Mirko Loghi, Massimo Poncino	Energy-Efficient Multiprocessor Systems-on-Chip for Embedded Computing: Exploring Programming Models and Their Architectural Support.	IEEE Trans. Computers	2007	DBLP DOI BibTeX RDF	embedded multimedia, low power, energy efficiency, MPSoCs, programming models, task-level parallelism
1	Giacomo Paci, Paul Marchal, Francesco Poletti, Luca Benini	Exploring "temperature-aware" design in low-power MPSoCs.	DATE	2006	DBLP DOI BibTeX RDF
1	Antonis Papanikolaou, Miguel Miranda, Hua Wang, Francky Catthoor, M. Satyakiran, Pol Marchal, Ben Kaczer, C. Bruynseraede, Zsolt Tokei	Reliability issues in deep deep sub-micron technologies: time-dependent variability and its impact on embedded system design.	VLSI-SoC	2006	DBLP DOI BibTeX RDF
1	Jin Guo, Antonis Papanikolaou, Pol Marchal, Francky Catthoor	Energy/area/delay trade-offs in the physical design of on-chip segmented bus architecture.	SLIP	2006	DBLP DOI BibTeX RDF	segmented bus, floorplanning, trade-offs
1	Jin Guo, Antonis Papanikolaou, Pol Marchal, Francky Catthoor	Physical design implementation of segmented buses to reduce communication energy.	ASP-DAC	2006	DBLP DOI BibTeX RDF
1	Francesco Poletti, Antonio Poggiali, Paul Marchal	Flexible Hardware/Software Support for Message Passing on a Distributed Shared Memory Architecture.	DATE	2005	DBLP DOI BibTeX RDF
1	Anthony Leroy, Paul Marchal, Adelina Shickova, Francky Catthoor, Frédéric Robert, Diederik Verkest	Spatial division multiplexing: a novel approach for guaranteed throughput on NoCs.	CODES+ISSS	2005	DBLP DOI BibTeX RDF	spatial division multiplexing, network-on-chip
1	Mohammed Javed Absar, Pol Marchal, Francky Catthoor	Data-Access Optimization of Embedded Systems Through Selective Inlining Transformation.	ESTImedia	2005	DBLP DOI BibTeX RDF
1	Paul Marchal, Francky Catthoor, Davide Bruni, Luca Benini, José Ignacio Gómez, Luis Piñuel	Integrated Task Scheduling and Data Assignment for SDRAMs in Dynamic Applications.	IEEE Design & Test of Computers	2004	DBLP DOI BibTeX RDF
1	Francesco Poletti, Paul Marchal, David Atienza, Luca Benini, Francky Catthoor, Jose Manuel Mendias	An integrated hardware/software approach for run-time scratchpad management.	DAC	2004	DBLP DOI BibTeX RDF	AMBA AHB, scratchpad, DMA, dynamic allocation
1	José Ignacio Gómez, Paul Marchal, Sven Verdoolaege, Luis Piñuel, Francky Catthoor	Optimizing the Memory Bandwidth with Loop Morphing.	ASAP	2004	DBLP DOI BibTeX RDF
1	Paul Marchal, José Ignacio Gómez, Francky Catthoor	Optimizing the memory bandwidth with loop fusion.	CODES+ISSS	2004	DBLP DOI BibTeX RDF	low power, memory bandwidth, loop fusion
1	Paul Marchal, José Ignacio Gómez, Luis Piñuel, Davide Bruni, Luca Benini, Francky Catthoor, Henk Corporaal	SDRAM-Energy-Aware Memory Allocation for Dynamic Multi-Media Applications on Multi-Processor Platforms.	DATE	2003	DBLP DOI BibTeX RDF
1	Paul Marchal, Murali Jayapala, Samuel Xavier de Souza, Peng Yang, Francky Catthoor, Geert Deconinck	Matador: An Exploration Environment for System-Design.	Journal of Circuits, Systems, and Computers	2002	DBLP DOI BibTeX RDF
1	Rudy Lauwereins, Chun Wong, Paul Marchal, Johan Vounckx, Patrick David, Stefaan Himpe, Francky Catthoor, Peng Yang	Managing Dynamic Concurrent Tasks in Embedded Real-Time Multimedia Systems.	ISSS	2002	DBLP DOI BibTeX RDF	scheduling, embedded system, low-power, multiprocessor
1	Peng Yang, Chun Wong, Paul Marchal, Francky Catthoor, Dirk Desmet, Diederik Verkest, Rudy Lauwereins	Energy-Aware Runtime Scheduling for Embedded-Multiprocessor SOCs.	IEEE Design & Test of Computers	2001	DBLP DOI BibTeX RDF
1	Chun Wong, Paul Marchal, Peng Yang, Francky Catthoor, Hugo De Man, Aggeliki S. Prayati, Nathalie Cossement, Rudy Lauwereins, Diederik Verkest	Task concurrency management methodology summary.	DATE	2001	DBLP DOI BibTeX RDF
1	Diederik Verkest, Peng Yang, Chun Wong, Paul Marchal	Optimisation Problems for Dynamic Concurrent Task-Based Systems.	ICCAD	2001	DBLP BibTeX RDF
1	Chun Wong, Paul Marchal, Peng Yang	Task concurrency management methodology to schedule the MPEG4 IM1 player on a highly parallel processor platform.	CODES	2001	DBLP DOI BibTeX RDF	scheduling, embedded system, concurrency, MPEG-4, cost-efficiency
1	Paul Marchal, Chun Wong, Aggeliki S. Prayati, Nathalie Cossement, Francky Catthoor, Rudy Lauwereins, Diederik Verkest, Hugo De Man	Dynamic Memory Oriented Transformations in the MPEG4 IM1-Player on a Low Power Platform.	PACS	2000	DBLP DOI BibTeX RDF
1	Aggeliki S. Prayati, Chun Wong, Paul Marchal, Nathalie Cossement, Francky Catthoor, Rudy Lauwereins, Diederik Verkest, Hugo De Man, Alexios N. Birbas	Task Concurrency Management Experiment for Power-Efficient Speed-up of Embedded MPEG4 IM1 Player. (PDF / PS)	ICPP Workshops	2000	DBLP DOI BibTeX RDF

Publications of Paul Marchal Pol Marchal ( http://dblp.L3S.de/Authors/Paul_Marchal )