| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Paul Molitor |
Reviewer Thanks.  |
it - Information Technology  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Christian Ernst, Changxing Dong, Gerold Jäger, Dirk Richter, Paul Molitor |
Finding Good Tours for Huge Euclidean TSP Instances by Iterative Backbone Contraction. |
AAIM |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Changxing Dong, Gerold Jäger, Dirk Richter, Paul Molitor |
Effective Tour Searching for TSP by Contraction of Pseudo Backbone Edges. |
AAIM |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Changxing Dong, Christian Ernst, Gerold Jäger, Dirk Richter, Paul Molitor |
Effective Heuristics for Large Euclidean TSP Instances Based on Pseudo Backbones. |
CTW |
2009 |
DBLP BibTeX RDF |
|
| 1 | Paul Molitor |
Gutachter 2008. |
it - Information Technology |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Bernd Becker, Paul Molitor |
Technische Informatik - eine einführende Darstellung. |
|
2008 |
RDF |
|
| 1 | Gerold Jäger, Paul Molitor |
Algorithms and Experimental Study for the Traveling Salesman Problem of Second Order. |
COCOA |
2008 |
DBLP DOI BibTeX RDF |
Traveling Salesman Problem of Second Order, Heuristic, Traveling Salesman Problem, Exact Algorithm, Assignment Problem |
| 1 | Changxing Dong, Paul Molitor |
What Graphs can be Efficiently Represented by BDDs? |
ICCTA |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Dirk Richter, Boris Goldengorin, Gerold Jäger, Paul Molitor |
Improving the Efficiency of Helsgaun's Lin-Kernighan Heuristic for the Symmetric TSP. |
CAAN |
2007 |
DBLP DOI BibTeX RDF |
Lin-Kernighan Heuristic, Double Bridge Technique, Traveling Salesman Problem, Tolerances, Backbones |
| 1 | Paul Molitor |
...was wird mit übrigens? |
it - Information Technology |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Boris Goldengorin, Gerold Jäger, Paul Molitor |
Some Basics on Tolerances. |
AAIM |
2006 |
DBLP DOI BibTeX RDF |
upper tolerance, lower tolerance, Sensitivity analysis |
| 1 | Boris Goldengorin, Gerold Jäger, Paul Molitor |
Tolerance Based Contract-or-Patch Heuristic for the Asymmetric TSP. |
CAAN |
2006 |
DBLP DOI BibTeX RDF |
Construction Heuristics, Traveling Salesman Problem, Tolerances |
| 1 | Paul Molitor |
Gutachter 2005. |
it - Information Technology |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Paul Molitor |
Gutachter 2004. |
it - Information Technology |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Paul Molitor, Jörg Ritter |
VHDL - eine Einführung. |
|
2004 |
RDF |
|
| 1 | Heinz Zemanek, Johannes Oldenbourg, Paul Molitor, Klaus Küspert, Kurt Rothermel |
Zum neuen Jahrgang. |
it - Information Technology |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Martin Keim, Rolf Drechsler, Bernd Becker, Michael Martin, Paul Molitor |
Polynomial Formal Verification of Multipliers. |
Formal Methods in System Design |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Janett Mohnke, Paul Molitor, Sharad Malik |
Limits of Using Signatures for Permutation Independent Boolean Comparison. |
Formal Methods in System Design |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Robby Schönfeld, Paul Molitor |
What are the samples for learning efficient routing heuristics? [MCM routing]. |
APCCAS |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Janett Mohnke, Paul Molitor, Sharad Malik |
Application of BDDs in Boolean matching techniques for formal logic combinational verification. |
STTT |
2001 |
DBLP DOI BibTeX RDF |
Permutation independent comparison of Boolean functions, Signature of Boolean variables, Formal verification |
| 1 | Jörg Ritter, Paul Molitor |
A pipelined architecture for partitioned DWT based lossy image compression using FPGA's. |
FPGA |
2001 |
DBLP DOI BibTeX RDF |
embedded zero tree coding, FPGA, field programmable gate arrays, architecture, wavelet transformation, pipelining, Xilinx, lossy image compression |
| 1 | Laura Heinrich-Litan, Paul Molitor |
Least Upper Bounds for the Size of OBDDs Using Symmetry Properties. |
IEEE Trans. Computers |
2000 |
DBLP DOI BibTeX RDF |
upper worst case bounds, partial symmetric Boolean functions, Binary decision diagrams, variable ordering |
| 1 | Sandro Wefel, Paul Molitor |
Prove that a faulty multiplier is faulty!? |
ACM Great Lakes Symposium on VLSI |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Riccardo Forth, Paul Molitor |
An efficient heuristic for state encoding minimizing the BDD representations of the transistion relations of finite state machines. |
ASP-DAC |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Wolfgang Günther, Robby Schönfeld, Bernd Becker, Paul Molitor |
k-Layer Straightline Crossing Minimization by Speeding Up Sifting. |
Graph Drawing |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Christoph Scholl, Dirk Möller, Paul Molitor, Rolf Drechsler |
BDD minimization using symmetries. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Janett Mohnke, Paul Molitor, Sharad Malik |
Establishing latch correspondence for sequential circuits using distinguishing signatures. |
Integration |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Paul Molitor, Christoph Scholl |
Datenstrukturen und effiziente Algorithmen für die Logiksynthese kombinatorischer Schaltungen. |
|
1999 |
RDF |
|
| 1 | Christian Matuszewski, Robby Schönfeld, Paul Molitor |
Using Sifting for k -Layer Straightline Crossing Minimization. |
Graph Drawing |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Laura Heinrich-Litan, Ursula Fissgus, St. Sutter, Paul Molitor, Thomas Rauber |
Modeling the Communication Behavior of Distributed Memory Machines by Genetic Programming. |
Euro-Par |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Martin Keim, Michael Martin, Bernd Becker, Rolf Drechsler, Paul Molitor |
Polynomial Formal Verification of Multipliers. |
VTS |
1997 |
DBLP DOI BibTeX RDF |
Binary Moment Diagram (BMD), Verification, Multiplier |
| 1 | Christoph Scholl, S. Melchior, Günter Hotz, Paul Molitor |
Minimizing ROBDD sizes of incompletely specified Boolean functionsby exploiting strong symmetries. |
ED&TC |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Tolga Asveren, Paul Molitor |
New Crossover Methods For Sequencing Problems. |
PPSN |
1996 |
DBLP DOI BibTeX RDF |
|
| 1 | Laura Heinrich-Litan, Paul Molitor, Dirk Möller |
Least Upper Bounds on the Sizes of Symmetric Variable Order based OBDDs. |
Great Lakes Symposium on VLSI |
1996 |
DBLP DOI BibTeX RDF |
|
| 1 | Bernd Becker, Rolf Drechsler, Paul Molitor |
On the generation of area-time optimal testable adders. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
1995 |
DBLP DOI BibTeX RDF |
|
| 1 | Ines Peters, Paul Molitor |
Priority driven channel pin assignment. |
Great Lakes Symposium on VLSI |
1995 |
DBLP DOI BibTeX RDF |
polynomial time improvement, linear channel pin assignment, LCPA algorithms, minimum channel density, vertical constraints, priority driven channel pin assignment, channel height, computational complexity, VLSI, VLSI, network routing, circuit layout CAD, running time, integrated circuit layout, priority schedule, channel routing |
| 1 | Janett Mohnke, Paul Molitor, Sharad Malik |
Limits of using signatures for permutation independent Boolean comparison. |
ASP-DAC |
1995 |
DBLP DOI BibTeX RDF |
|
| 1 | Christoph Scholl, Paul Molitor |
Communication based FPGA synthesis for multi-output Boolean functions. |
ASP-DAC |
1995 |
DBLP DOI BibTeX RDF |
|
| 1 | Paul Molitor, Uwe Sparmann, Dorothea Wagner |
Two-Layer Wiring with Pin Preassignments is Easier if the Power Supply Nets are Already Generated. |
VLSI Design |
1994 |
DBLP BibTeX RDF |
|
| 1 | Michael Kaufmann, Paul Molitor, Wolfgang Vogelgesang |
Performance Driven k-Layer Wiring. |
STACS |
1992 |
DBLP DOI BibTeX RDF |
|
| 1 | Paul Molitor |
A Survey on Wiring. |
Elektronische Informationsverarbeitung und Kybernetik |
1991 |
DBLP BibTeX RDF |
|
| 1 | Paul Molitor |
Constrained via minimization for systolic arrays. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
1990 |
DBLP DOI BibTeX RDF |
|
| 1 | Bernd Becker, Thomas Burch, Günter Hotz, D. Kiel, Reiner Kolla, Paul Molitor, Hans-Georg Osthof, Gisela Pitsch, Uwe Sparmann |
A graphical system for hierarchical specifications and checkups of VLSI circuits. |
EURO-DAC |
1990 |
DBLP DOI BibTeX RDF |
|
| 1 | Reiner Kolla, Paul Molitor, Hans-Georg Osthof |
Einführung in den VLSI-Entwurf. |
|
1989 |
RDF |
|
| 1 | Paul Molitor |
On the Contact-Minimization-Problem. |
STACS |
1987 |
DBLP DOI BibTeX RDF |
|
| 1 | Bernd Becker, Günter Hotz, Reiner Kolla, Paul Molitor, Hans-Georg Osthof |
Hierarchical Design Based on a Calculus of Nets. |
DAC |
1987 |
DBLP DOI BibTeX RDF |
|
| 1 | Günter Hotz, Bernd Becker, Reiner Kolla, Paul Molitor |
Ein logisch-topologischer Kalkül zur Konstruktion integrierter Schaltkreise, Teil I. |
Inform., Forsch. Entwickl. |
1986 |
DBLP BibTeX RDF |
|
| 1 | Günter Hotz, Bernd Becker, Reiner Kolla, Paul Molitor |
Ein logisch-topologischer Kalkül zur Konstruktion integrierter Schaltkreise, Teil II. |
Inform., Forsch. Entwickl. |
1986 |
DBLP BibTeX RDF |
|
| 1 | Günter Hotz, Reiner Kolla, Paul Molitor |
On Network Algebras and Recursive Equations. |
Graph-Grammars and Their Application to Computer Science |
1986 |
DBLP DOI BibTeX RDF |
|
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