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Publications of "Peeter Ellervee" ( http://dblp.L3S.de/Authors/Peeter_Ellervee )

  Author page on DBLP  Author page in RDF  Community of Peeter Ellervee in ASPL-2

Publication years (Num. hits)
1994-2006 (15) 2007-2011 (6)
Publication types (Num. hits)
article(3) inproceedings(18)
Venues (Conferences, Journals, ...)
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The graphs summarize 12 occurrences of 12 keywords

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Found 21 publication records. Showing 21 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Uljana Reinsalu, Jaan Raik, Raimund Ubar, Peeter Ellervee Fast RTL Fault Simulation Using Decision Diagrams and Bitwise Set Operations. Search on Bibsonomy DFT The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Mihkel Tagel, Peeter Ellervee, Thorsten Hollstein, Gert Jervan Communication modelling and synthesis for NoC-based systems with real-time constraints. Search on Bibsonomy DDECS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Peeter Ellervee, Gert Jervan Guest Editorial. Search on Bibsonomy Microprocessors and Microsystems - Embedded Hardware Design The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Raimund Ubar, Sergei Devadze, Maksim Jenihhin, Jaan Raik, Gert Jervan, Peeter Ellervee Hierarchical Calculation of Malicious Faults for Evaluating the Fault-Tolerance. Search on Bibsonomy DELTA The full citation details ... 2008 DBLP  DOI  BibTeX  RDF high-level decision diagrams, fault tolerance, fault simulation
1Jaan Raik, Uljana Reinsalu, Raimund Ubar, Maksim Jenihhin, Peeter Ellervee Code Coverage Analysis using High-Level Decision Diagrams. Search on Bibsonomy DDECS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Peeter Ellervee, Jaan Raik, Kalle Tammemäe, Raimund Ubar FPGA-based fault emulation of synchronous sequential circuits. Search on Bibsonomy IET Computers & Digital Techniques The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Gert Jervan, Anton Arhipov, Peeter Ellervee Work in Progress: FPGA Based Emulation Environment. Search on Bibsonomy ReCoSoC The full citation details ... 2006 DBLP  BibTeX  RDF
1Jaan Raik, Peeter Ellervee, Valentin Tihhomirov, Raimund Ubar Improved Fault Emulation for Synchronous Sequential Circuits. Search on Bibsonomy DSD The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
1Peeter Ellervee, Jaan Raik, Valentin Tihhomirov, Kalle Tammemäe Evaluating Fault Emulation on FPGA. Search on Bibsonomy FPL The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
1Abhijit Chatterjee, Peeter Ellervee, Vincent John Mooney III, Jun-Cheol Park, Kyu-won Choi, Kiran Puttaswamy System Level Power-Performance Trade-Offs in Embedded Systems Using Voltage and Frequency Scaling of Off-Chip Buses and Memory. Search on Bibsonomy ISSS The full citation details ... 2002 DBLP  DOI  BibTeX  RDF voltage/frequency scaling, embedded systems, design space, power-performance trade-offs
1Peeter Ellervee, Miguel Miranda, Francky Catthoor, Ahmed Hemani System-level data-format exploration for dynamically allocated datastructures. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
1Peeter Ellervee, Hannu Tenhunen Digital Hardware Organization Course for SoC Program. (PDF / PS) Search on Bibsonomy MSE The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
1Peeter Ellervee, Miguel Miranda, Francky Catthoor, Ahmed Hemani System-level data format exploration for dynamically allocated data structures. Search on Bibsonomy DAC The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
1Elena Dubrova, Peeter Ellervee, D. Michael Miller, Jon C. Muzio TOP: An Algorithm for Three-Level Optimization of PLDs. Search on Bibsonomy DATE The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
1Ahmed Hemani, Thomas Meincke, Shashi Kumar, Adam Postula, Thomas Olsson, Peter Nilsson, Johnny Öberg, Peeter Ellervee, Dan Lundqvist Lowering Power Consumption in Clock by Using Globally Asynchronous Locally Synchronous Design Style. Search on Bibsonomy DAC The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
1Thomas Meincke, Ahmed Hemani, Shashi Kumar, Peeter Ellervee, Johnny Öberg, Thomas Olsson, Peter Nilsson, Dan Lindqvist, Hannu Tenhunen Globally asynchronous locally synchronous architecture for large high-performance ASICs. Search on Bibsonomy ISCAS The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
1Peeter Ellervee, Ahmed Hemani, Miguel Miranda, Francky Catthoor Exploiting Data Transfer Locality in Memory Mapping. Search on Bibsonomy EUROMICRO The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
1Johnny Öberg, Peeter Ellervee Revolver: A High-Performance MIMD Architecture for Collision Free Computing. Search on Bibsonomy EUROMICRO The full citation details ... 1998 DBLP  DOI  BibTeX  RDF
1Bengt Svantesson, Ahmed Hemani, Peeter Ellervee, Adam Postula, Johnny Öberg, Axel Jantsch, Hannu Tenhunen A Novell Allocation Strategy for Control and Memory Intensive Telecommunication Circiuts. Search on Bibsonomy VLSI Design The full citation details ... 1996 DBLP  DOI  BibTeX  RDF Application specific High-Level Synthesis, High-Level Synthesis for telecommunication, ATM
1Johnny Öberg, Jouni Isoaho, Peeter Ellervee, Axel Jantsch, Ahmed Hemani A Rule-Based Approach for Improving Allocation of Filter Structures in HLS. Search on Bibsonomy VLSI Design The full citation details ... 1996 DBLP  DOI  BibTeX  RDF CDFG, CDFG Transformations, Filter structures, Optimisations, High-Level Synthesis, Allocation, Rule-Based
1Axel Jantsch, Peeter Ellervee, Ahmed Hemani, Johnny Öberg, Hannu Tenhunen Hardware/software partitioning and minimizing memory interface traffic. Search on Bibsonomy EURO-DAC The full citation details ... 1994 DBLP  DOI  BibTeX  RDF C++, VHDL
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