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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 12 occurrences of 12 keywords
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Results
Found 21 publication records. Showing 21 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Uljana Reinsalu, Jaan Raik, Raimund Ubar, Peeter Ellervee |
Fast RTL Fault Simulation Using Decision Diagrams and Bitwise Set Operations.  |
DFT  |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Mihkel Tagel, Peeter Ellervee, Thorsten Hollstein, Gert Jervan |
Communication modelling and synthesis for NoC-based systems with real-time constraints.  |
DDECS  |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Peeter Ellervee, Gert Jervan |
Guest Editorial.  |
Microprocessors and Microsystems - Embedded Hardware Design  |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Raimund Ubar, Sergei Devadze, Maksim Jenihhin, Jaan Raik, Gert Jervan, Peeter Ellervee |
Hierarchical Calculation of Malicious Faults for Evaluating the Fault-Tolerance.  |
DELTA  |
2008 |
DBLP DOI BibTeX RDF |
high-level decision diagrams, fault tolerance, fault simulation |
| 1 | Jaan Raik, Uljana Reinsalu, Raimund Ubar, Maksim Jenihhin, Peeter Ellervee |
Code Coverage Analysis using High-Level Decision Diagrams.  |
DDECS  |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Peeter Ellervee, Jaan Raik, Kalle Tammemäe, Raimund Ubar |
FPGA-based fault emulation of synchronous sequential circuits.  |
IET Computers & Digital Techniques  |
2007 |
DBLP DOI BibTeX RDF |
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| 1 | Gert Jervan, Anton Arhipov, Peeter Ellervee |
Work in Progress: FPGA Based Emulation Environment.  |
ReCoSoC  |
2006 |
DBLP BibTeX RDF |
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| 1 | Jaan Raik, Peeter Ellervee, Valentin Tihhomirov, Raimund Ubar |
Improved Fault Emulation for Synchronous Sequential Circuits.  |
DSD  |
2005 |
DBLP DOI BibTeX RDF |
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| 1 | Peeter Ellervee, Jaan Raik, Valentin Tihhomirov, Kalle Tammemäe |
Evaluating Fault Emulation on FPGA.  |
FPL  |
2004 |
DBLP DOI BibTeX RDF |
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| 1 | Abhijit Chatterjee, Peeter Ellervee, Vincent John Mooney III, Jun-Cheol Park, Kyu-won Choi, Kiran Puttaswamy |
System Level Power-Performance Trade-Offs in Embedded Systems Using Voltage and Frequency Scaling of Off-Chip Buses and Memory.  |
ISSS  |
2002 |
DBLP DOI BibTeX RDF |
voltage/frequency scaling, embedded systems, design space, power-performance trade-offs |
| 1 | Peeter Ellervee, Miguel Miranda, Francky Catthoor, Ahmed Hemani |
System-level data-format exploration for dynamically allocated datastructures.  |
IEEE Trans. on CAD of Integrated Circuits and Systems  |
2001 |
DBLP DOI BibTeX RDF |
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| 1 | Peeter Ellervee, Hannu Tenhunen |
Digital Hardware Organization Course for SoC Program. (PDF / PS)  |
MSE  |
2001 |
DBLP DOI BibTeX RDF |
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| 1 | Peeter Ellervee, Miguel Miranda, Francky Catthoor, Ahmed Hemani |
System-level data format exploration for dynamically allocated data structures.  |
DAC  |
2000 |
DBLP DOI BibTeX RDF |
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| 1 | Elena Dubrova, Peeter Ellervee, D. Michael Miller, Jon C. Muzio |
TOP: An Algorithm for Three-Level Optimization of PLDs.  |
DATE  |
2000 |
DBLP DOI BibTeX RDF |
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| 1 | Ahmed Hemani, Thomas Meincke, Shashi Kumar, Adam Postula, Thomas Olsson, Peter Nilsson, Johnny Öberg, Peeter Ellervee, Dan Lundqvist |
Lowering Power Consumption in Clock by Using Globally Asynchronous Locally Synchronous Design Style.  |
DAC  |
1999 |
DBLP DOI BibTeX RDF |
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| 1 | Thomas Meincke, Ahmed Hemani, Shashi Kumar, Peeter Ellervee, Johnny Öberg, Thomas Olsson, Peter Nilsson, Dan Lindqvist, Hannu Tenhunen |
Globally asynchronous locally synchronous architecture for large high-performance ASICs.  |
ISCAS  |
1999 |
DBLP DOI BibTeX RDF |
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| 1 | Peeter Ellervee, Ahmed Hemani, Miguel Miranda, Francky Catthoor |
Exploiting Data Transfer Locality in Memory Mapping.  |
EUROMICRO  |
1999 |
DBLP DOI BibTeX RDF |
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| 1 | Johnny Öberg, Peeter Ellervee |
Revolver: A High-Performance MIMD Architecture for Collision Free Computing.  |
EUROMICRO  |
1998 |
DBLP DOI BibTeX RDF |
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| 1 | Bengt Svantesson, Ahmed Hemani, Peeter Ellervee, Adam Postula, Johnny Öberg, Axel Jantsch, Hannu Tenhunen |
A Novell Allocation Strategy for Control and Memory Intensive Telecommunication Circiuts.  |
VLSI Design  |
1996 |
DBLP DOI BibTeX RDF |
Application specific High-Level Synthesis, High-Level Synthesis for telecommunication, ATM |
| 1 | Johnny Öberg, Jouni Isoaho, Peeter Ellervee, Axel Jantsch, Ahmed Hemani |
A Rule-Based Approach for Improving Allocation of Filter Structures in HLS.  |
VLSI Design  |
1996 |
DBLP DOI BibTeX RDF |
CDFG, CDFG Transformations, Filter structures, Optimisations, High-Level Synthesis, Allocation, Rule-Based |
| 1 | Axel Jantsch, Peeter Ellervee, Ahmed Hemani, Johnny Öberg, Hannu Tenhunen |
Hardware/software partitioning and minimizing memory interface traffic.  |
EURO-DAC  |
1994 |
DBLP DOI BibTeX RDF |
C++, VHDL |
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