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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 11 occurrences of 11 keywords
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Results
Found 5 publication records. Showing 5 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Victor W. Lee, Changkyu Kim, Jatin Chhugani, Michael Deisher, Daehyun Kim, Anthony D. Nguyen, Nadathur Satish, Mikhail Smelyanskiy, Srinivas Chennupaty, Per Hammarlund, Ronak Singhal, Pradeep Dubey |
Debunking the 100X GPU vs. CPU myth: an evaluation of throughput computing on CPU and GPU.  |
ISCA  |
2010 |
DBLP DOI BibTeX RDF |
cpu architecture, gpu architecture, throughput computing, performance analysis, performance measurement, software optimization |
| 1 | Graham Schelle, Jamison D. Collins, Ethan Schuchman, Perry H. Wang, Xiang Zou, Gautham N. Chinya, Ralf Plate, Thorsten Mattner, Franz Olbrich, Per Hammarlund, Ronak Singhal, Jim Brayton, Sebastian Steibl, Hong Wang 0003 |
Intel nehalem processor core made FPGA synthesizable. |
FPGA |
2010 |
DBLP DOI BibTeX RDF |
intel nehalem, synthesizable core, fpga, emulator |
| 1 | Tor M. Aamodt, Paul Chow, Per Hammarlund, Hong Wang 0003, John Paul Shen |
Hardware Support for Prescient Instruction Prefetch. |
HPCA |
2004 |
DBLP DOI BibTeX RDF |
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| 1 | Tor M. Aamodt, Pedro Marcuello, Paul Chow, Antonio González, Per Hammarlund, Hong Wang 0003, John Paul Shen |
A framework for modeling and optimization of prescient instruction prefetch. |
SIGMETRICS |
2003 |
DBLP DOI BibTeX RDF |
optimization, multithreading, analytical modeling, path expressions, helper threads, instruction prefetch |
| 1 | Per Hammarlund, Örjan Ekeberg |
Large Neural Network Simulations on Multiple Hardware Platforms. |
Journal of Computational Neuroscience |
1998 |
DBLP DOI BibTeX RDF |
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Displaying result #1 - #5 of 5 (100 per page; Change: )
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