| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Peter Marwedel, Michael Engel |
Energy Efficiency in IT.  |
it - Information Technology  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Andreas Heinig, Vincent John Mooney, Florian Schmoll, Peter Marwedel, Krishna V. Palem, Michael Engel |
Classification-Based Improvement of Application Robustness and Quality of Service in Probabilistic Computer Systems. |
ARCS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniel Cordes, Peter Marwedel |
Multi-objective aware extraction of task-level parallelism using genetic algorithms. |
DATE |
2012 |
DBLP BibTeX RDF |
|
| 1 | Heiko Falk, Peter Marwedel, Paul Lokuciejewski |
Reconciling Compilation and Timing Analysis. |
Advances in Real-Time Systems |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Sudipta Chattopadhyay, Chong Lee Kee, Abhik Roychoudhury, Timon Kelter, Peter Marwedel, Heiko Falk |
A Unified WCET Analysis Framework for Multi-core Platforms. |
IEEE Real-Time and Embedded Technology and Applications Symposium |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Paul Lokuciejewski, Sascha Plazar, Heiko Falk, Peter Marwedel, Lothar Thiele |
Approximating Pareto optimal compiler optimization sequences - a trade-off between WCET, ACET and code size. |
Softw., Pract. Exper. |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Paul Lokuciejewski, Peter Marwedel |
Worst-Case Execution Time Aware Compilation Techniques for Real-Time Systems. |
|
2011 |
DOI RDF |
|
| 1 | Jan C. Kleinsorge, Heiko Falk, Peter Marwedel |
A synergetic approach to accurate analysis of cache-related preemption delay. |
EMSOFT |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniel Cordes, Andreas Heinig, Peter Marwedel, Arindam Mallik |
Automatic Extraction of Pipeline Parallelism for Embedded Software Using Linear Programming. |
ICPADS |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Sascha Plazar, Jan C. Kleinsorge, Heiko Falk, Peter Marwedel |
WCET-driven branch prediction aware code positioning. |
CASES |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Frank Weichert, Constantin Timm, Marcel Gaspar, Alexander Zybin, Evgeny L. Gurevich, Heinrich Müller, Peter Marwedel |
GPGPU-basierte Echtzeitdetektion von Nanoobjekten mittels Plasmonen-unterstützter Mikroskopie. |
Bildverarbeitung für die Medizin |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Peter Marwedel, Jürgen Teich, Georgia Kouveli, Iuliana Bacivarov, Lothar Thiele, Soonhoi Ha, Chanhee Lee, Qiang Xu, Lin Huang |
Mapping of applications to MPSoCs. |
CODES+ISSS |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Jörg Henkel, Lars Bauer, Joachim Becker, Oliver Bringmann, Uwe Brinkschulte, Samarjit Chakraborty, Michael Engel, Rolf Ernst, Hermann Härtig, Lars Hedrich, Andreas Herkersdorf, Rüdiger Kapitza, Daniel Lohmann, Peter Marwedel, Marco Platzner, Wolfgang Rosenstiel, Ulf Schlichtmann, Olaf Spinczyk, Mehdi Baradaran Tahoori, Jürgen Teich, Norbert Wehn, Hans-Joachim Wunderlich |
Design and architectures for dependable embedded systems. |
CODES+ISSS |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Peter Marwedel, Michael Engel |
Plea for a Holistic Analysis of the Relationship between Information Technology and Carbon-Dioxide Emissions. |
ARCS Workshops |
2010 |
DBLP BibTeX RDF |
|
| 1 | Christos Baloukas, Lazaros Papadopoulos, Robert Pyka, Dimitrios Soudris, Peter Marwedel |
An automatic framework for dynamic data structures optimization in C. |
VLSI-SoC |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Arindam Mallik, Peter Marwedel, Dimitrios Soudris, Sander Stuijk |
MNEMEE: a framework for memory management and optimization of static and dynamic data in MPSoCs. |
CASES |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Paul Lokuciejewski, Timon Kelter, Peter Marwedel |
Superblock-Based Source Code Optimizations for WCET Reduction. |
CIT |
2010 |
DBLP DOI BibTeX RDF |
Optimizations, Embedded Systems, Real-Time, Compiler, WCET, Superblock |
| 1 | Sascha Plazar, Paul Lokuciejewski, Peter Marwedel |
WCET-Driven Cache-Aware Memory Content Selection. |
ISORC |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Paul Lokuciejewski, Sascha Plazar, Heiko Falk, Peter Marwedel, Lothar Thiele |
Multi-objective Exploration of Compiler Optimizations for Real-Time Systems. |
ISORC |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Andreas Heinig, Michael Engel, Florian Schmoll, Peter Marwedel |
Improving transient memory fault resilience of an H.264 decoder. |
ESTImedia |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Robert Pyka, Felipe Klein, Peter Marwedel, Stylianos Mamagkakis |
Versatile system-level memory-aware platform description approach for embedded MPSoCs. |
LCTES |
2010 |
DBLP DOI BibTeX RDF |
framework, component, configuration, channel, definition, energy models, architecture description |
| 1 | Daniel Cordes, Peter Marwedel, Arindam Mallik |
Automatic parallelization of embedded software using hierarchical task graphs and integer linear programming. |
CODES+ISSS |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Paul Lokuciejewski, Daniel Cordes, Heiko Falk, Peter Marwedel |
A Fast and Precise Static Loop Analysis Based on Abstract Interpretation, Program Slicing and Polytope Models. |
CGO |
2009 |
DBLP DOI BibTeX RDF |
loop analysis, abstract interpretation, WCET analysis, static program analysis |
| 1 | Paul Lokuciejewski, Fatih Gedikli, Peter Marwedel |
Accelerating WCET-driven optimizations by the invariant path paradigm: a case study of loop unswitching. |
SCOPES |
2009 |
DBLP BibTeX RDF |
|
| 1 | Paul Lokuciejewski, Peter Marwedel |
Combining Worst-Case Timing Models, Loop Unrolling, and Static Loop Analysis for WCET Minimization. |
ECRTS |
2009 |
DBLP DOI BibTeX RDF |
WCET minimization, WCET-driven optimizations, High-Level Optimizations, compiler, WCET |
| 1 | Peter Marwedel |
Plädoyer für eine ganzheitliche Betrachtung des Zusammenhangs zwischen Informationstechnologie und CO2-Produktion. |
GI Jahrestagung |
2009 |
DBLP BibTeX RDF |
|
| 1 | Sascha Plazar, Paul Lokuciejewski, Peter Marwedel |
WCET-aware Software Based Cache Partitioning for Multi-Task Real-Time Systems. |
WCET |
2009 |
DBLP BibTeX RDF |
|
| 1 | Constantin Timm, Jens Schmutzler, Peter Marwedel, Christian Wietfeld |
Dynamic web service orchestration applied to the device profile for web services in hierarchical networks. |
COMSWARE |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Paul Lokuciejewski, Heiko Falk, Peter Marwedel, Henrik Theiling |
WCET-driven, code-size critical procedure cloning. |
SCOPES |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Paul Lokuciejewski, Heiko Falk, Peter Marwedel |
WCET-driven Cache-based Procedure Positioning Optimizations. |
ECRTS |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Lars Wehmeyer, Peter Marwedel |
Influence of Memory Hierarchies on Predictability for Time Constrained Embedded Software |
CoRR |
2007 |
DBLP BibTeX RDF |
|
| 1 | Manish Verma, Peter Marwedel |
Advanced memory optimization techniques for low-power embedded processors. |
|
2007 |
RDF |
|
| 1 | Heiko Falk, Peter Marwedel (eds.) |
Proceedings of the 10th International Workshop on Software and Compilers for Embedded Systems, Nice, France, April 20, 2007 |
SCOPES |
2007 |
DBLP BibTeX RDF |
|
| 1 | Robert Pyka, Christoph Faßbach, Manish Verma, Heiko Falk, Peter Marwedel |
Operating system integrated energy aware scratchpad allocation strategies for multiprocess applications. |
SCOPES |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Paul Lokuciejewski, Heiko Falk, Martin Schwarzer, Peter Marwedel, Henrik Theiling |
Influence of procedure cloning on WCET prediction. |
CODES+ISSS |
2007 |
DBLP DOI BibTeX RDF |
WCET minimization, context-sensitive WCET-analysis, compiler optimizations |
| 1 | Manish Verma, Lars Wehmeyer, Peter Marwedel |
Cache-Aware Scratchpad-Allocation Algorithms for Energy-Constrained Embedded Systems. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Manish Verma, Peter Marwedel |
Overlay techniques for scratchpad memories in low power embedded processors. |
IEEE Trans. VLSI Syst. |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Lars Wehmeyer, Peter Marwedel |
Fast, efficient and predictable memory accesses - optimization algorithms for memory architecture aware compilation. |
|
2006 |
RDF |
|
| 1 | Manish Verma, Lars Wehmeyer, Robert Pyka, Peter Marwedel, Luca Benini |
Compilation and Simulation Tool Chain for Memory Aware Energy Optimizations . |
SAMOS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Lars Wehmeyer, Peter Marwedel |
nfluence of Memory Hierarchies on Predictability for Time Constrained Embedded Software. |
DATE |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Manish Verma, Peter Marwedel |
Memory Optimization Techniques for Low-Power Embedded Processors. |
GI Jahrestagung |
2005 |
DBLP BibTeX RDF |
|
| 1 | Manish Verma, Klaus Petzold, Lars Wehmeyer, Heiko Falk, Peter Marwedel |
Scratchpad Sharing Strategies for Multiprocess Embedded Systems: A First Approach. |
ESTImedia |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Grant Martin, Daniel Gajski, David Goodwin, Patrick Lysaght, Peter Marwedel, Mike Muller, Jeff Welser |
What will system level design be when it grows up? |
CODES+ISSS |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Heiko Falk, Peter Marwedel |
Source code optimization techniques for data flow dominated embedded software. |
|
2004 |
RDF |
|
| 1 | Peter Marwedel, Lars Wehmeyer, Manish Verma, Stefan Steinke, Urs Helmig |
Fast, predictable and low energy memory references through architecture-aware compilation. |
Design of Systems with Predictable Behaviour |
2004 |
DBLP BibTeX RDF |
|
| 1 | Peter Marwedel, Lars Wehmeyer, Manish Verma, Stefan Steinke, Urs Helmig |
Fast, predictable and low energy memory references through architecture-aware compilation. |
ASP-DAC |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Markus Lorenz, Peter Marwedel, Thorsten Dräger, Gerhard Fettweis, Rainer Leupers |
Compiler based exploration of DSP energy savings by SIMD operations. |
ASP-DAC |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Markus Lorenz, Peter Marwedel |
Phase Coupled Code Generation for DSPs Using a Genetic Algorithm. |
DATE |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Manish Verma, Lars Wehmeyer, Peter Marwedel |
Cache-Aware Scratchpad Allocation Algorithm. |
DATE |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Lars Wehmeyer, Urs Helmig, Peter Marwedel |
Compiler-optimized usage of partitioned memories. |
WMPI |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Peter Marwedel, Daniel Gajski, Erwin A. de Kock, Hugo De Man, Mariagiovanna Sami, Ingemar Söderquist |
Embedded systems education: how to teach the required skills? |
CODES+ISSS |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Manish Verma, Lars Wehmeyer, Peter Marwedel |
Dynamic overlay of scratchpad memory for energy minimization. |
CODES+ISSS |
2004 |
DBLP DOI BibTeX RDF |
overlay, scratchpad, dynamic allocation |
| 1 | Peter Marwedel, Catherine H. Gebotys |
Secure and safety-critical vs. insecure, non safety-critical embedded systems: do they require completely different design approaches? |
CODES+ISSS |
2004 |
DBLP DOI BibTeX RDF |
security, safety-critical |
| 1 | Peter Marwedel |
Embedded system design. |
|
2003 |
RDF |
|
| 1 | Peter Marwedel, Birgit Sirocic |
Overcoming The Limitations of Traditional Media For Teaching Modern Processor Desing. |
MSE |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Manish Verma, Lars Wehmeyer, Peter Marwedel |
Efficient Scratchpad Allocation Algorithms for Energy Constrained Embedded Systems. |
PACS |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Heiko Falk, Peter Marwedel |
Control Flow Driven Splitting of Loop Nests at the Source Code Level . |
DATE |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Peter Marwedel |
Guest Editor's Introduction: Processor-Based Designs. |
IEEE Design & Test of Computers |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Peter Marwedel |
Embedded Software: How To Make It Efficient? |
DSD |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | M. Balakrishnan, Peter Marwedel, Lars Wehmeyer, Nils Grunwald, Rajeshwari Banakar, Stefan Steinke |
Reducing Energy Consumption by Dynamic Copying of Instructions onto Onchip Memory. |
ISSS |
2002 |
DBLP DOI BibTeX RDF |
onchip memory, energy optimization |
| 1 | Stefan Steinke, Lars Wehmeyer, Bo-Sik Lee, Peter Marwedel |
Assigning Program and Data Objects to Scratchpad for Energy Reduction. |
DATE |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Peter Marwedel, Srinivas Devadas (eds.) |
Proceedings of the 2002 Joint Conference on Languages, Compilers, and Tools for Embedded Systems & Software and Compilers for Embedded Systems (LCTES'02-SCOPES'02), Berlin, Germany, 19-21 June 2002 |
LCTES-SCOPES |
2002 |
DBLP BibTeX RDF |
|
| 1 | Rajeshwari Banakar, Stefan Steinke, Bo-Sik Lee, M. Balakrishnan, Peter Marwedel |
Scratchpad memory: design alternative for cache on-chip memory in embedded systems. |
CODES |
2002 |
DBLP DOI BibTeX RDF |
Cactis, SCRATCHPAD |
| 1 | Lars Wehmeyer, Manoj Kumar Jain, Stefan Steinke, Peter Marwedel, M. Balakrishnan |
Analysis of the influence of register file size on energyconsumption, code size, and execution time. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Peter Marwedel |
Guest editorial. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Peter Marwedel |
Compiler für eingebettete Prozessoren (Compilers for Embedded Processors). |
it+ti - Informationstechnik und Technische Informatik |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Rainer Leupers, Peter Marwedel |
Retargetable compiler technology for embedded systems - tools and applications. |
|
2001 |
RDF |
|
| 1 | Markus Lorenz, David Koffmann, Steven Bashford, Rainer Leupers, Peter Marwedel |
Optimized address assignment for DSPs with SIMD memory accesses. |
ASP-DAC |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Markus Lorenz, Rainer Leupers, Peter Marwedel, Thorsten Dräger, Gerhard Fettweis |
Low-Energy DSP Code Generation Using a Genetic Algorithm. |
ICCD |
2001 |
DBLP BibTeX RDF |
|
| 1 | Manoj Kumar Jain, Lars Wehmeyer, Stefan Steinke, Peter Marwedel, M. Balakrishnan |
Evaluating register file size in ASIP design. |
CODES |
2001 |
DBLP DOI BibTeX RDF |
instruction power model, synthesis, application specific instruction set processor, instruction set, register file, register spill |
| 1 | Peter Marwedel |
Eingebettete Systeme. |
LOG IN |
2000 |
DBLP BibTeX RDF |
|
| 1 | Peter Marwedel |
Guest Editorial. |
ACM Trans. Design Autom. Electr. Syst. |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Anupam Basu, Rainer Leupers, Peter Marwedel |
Array Index Allocation under Register Constraints in DSP Programs. |
VLSI Design |
1999 |
DBLP BibTeX RDF |
|
| 1 | Rainer Leupers, Peter Marwedel |
Function inlining under code size constraints for embedded processors. |
ICCAD |
1999 |
DBLP BibTeX RDF |
|
| 1 | Rainer Leupers, Peter Marwedel |
Retargetable Code Generation Based on Structural Processor Description. |
Design Autom. for Emb. Sys. |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Rainer Leupers, Anupam Basu, Peter Marwedel |
Optimized Array Index Computation in DSP Programs. |
ASP-DAC |
1998 |
DBLP BibTeX RDF |
|
| 1 | Anupam Basu, Raj S. Mitra, Peter Marwedel |
Interface Synthesis for Embedded Applications in a Co Design Environment. |
VLSI Design |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Ralf Niemann, Peter Marwedel |
Synthesis of Communicating Controllers for Concurrent Hardware/Software Systems. |
DATE |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Anupam Basu, Rainer Leupers, Peter Marwedel |
Register-Constrained Address Computation in DSP Programs. |
DATE |
1998 |
DBLP DOI BibTeX RDF |
DSP compiler, address computation, embedded processors |
| 1 | Ralf Niemann, Peter Marwedel |
An Algorithm for Hardware/Software Partitioning Using Mixed Integer Linear Programming. |
Design Autom. for Emb. Sys. |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Rainer Leupers, Peter Marwedel |
Time-constrained code compaction for DSPs. |
IEEE Trans. VLSI Syst. |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Peter Marwedel, Carlos A. López-Barrio |
Guest Editor's Introduction: Design, Design Automation, and Test in Europe. |
IEEE Design & Test of Computers |
1997 |
DBLP BibTeX RDF |
|
| 1 | Peter Marwedel |
Code Generation for Core Processors. |
DAC |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Birger Landwehr, Peter Marwedel |
A New Optimization Technique for Improving Resource Exploitation and Critical Path Minimization. (PDF / PS) |
ISSS |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Rainer Leupers, Peter Marwedel |
Retargetable generation of code selectors from HDL processor models. |
ED&TC |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | J. El-Ziq, Najmi T. Jarwala, Niraj K. Jha, Peter Marwedel, Christos A. Papachristou, Janusz Rajski, John W. Sheppard |
Hardware-Software Co-Design for Test: It's the Last Straw! (PDF / PS) |
VTS |
1996 |
DBLP DOI BibTeX RDF |
|
| 1 | Rainer Leupers, Peter Marwedel |
Instruction-Set Modeling for ASIP Code Generation. |
VLSI Design |
1996 |
DBLP BibTeX RDF |
|
| 1 | Rainer Leupers, Peter Marwedel |
Algorithms for address assignment in DSP code generation. |
ICCAD |
1996 |
DBLP DOI BibTeX RDF |
code generation, address generation |
| 1 | Peter Marwedel, Gert Goossens (eds.) |
Code Generation for Embedded Processors [Dagstuhl Workshop, August 31 - September 2, 1994] |
Code Generation for Embedded Processors |
1995 |
DBLP BibTeX RDF |
|
| 1 | Ulrich Bieker, Peter Marwedel |
Retargetable Self-Test Program Generation Using Constraint Logic Programming. |
DAC |
1995 |
DBLP DOI BibTeX RDF |
|
| 1 | Rainer Leupers, Peter Marwedel |
Time-constrained code compaction for DSPs. |
ISSS |
1995 |
DBLP DOI BibTeX RDF |
code generation techniques, digital signal processing algorithms, encoding restrictions, exact timing behavior, hard real-time constraints, integer programming model, local code compaction, programmable DSP, rigid heuristics, time-constrained code compaction, real-time systems, timing, integer programming, instruction-level parallelism, source coding, automatic programming, digital signal processing chips, side-effects |
| 1 | Peter Marwedel, Rainer Leupers |
Instruction set extraction from programmable structures. |
EURO-DAC |
1994 |
DBLP DOI BibTeX RDF |
|
| 1 | Birger Landwehr, Peter Marwedel, Rainer Dömer |
OSCAR: optimum simultaneous scheduling, allocation and resource binding based on integer programming. |
EURO-DAC |
1994 |
DBLP DOI BibTeX RDF |
|
| 1 | Peter Marwedel |
Code generation for embedded processors: an introduction. |
Code Generation for Embedded Processors |
1994 |
DBLP BibTeX RDF |
|
| 1 | Rainer Leupers, Wolfgang Schenk, Peter Marwedel |
Microcode Generation for Flexible Parallel Target Architectures. |
IFIP PACT |
1994 |
DBLP BibTeX RDF |
|
| 1 | Peter Marwedel |
Synthese und Simulation von VLSI-Systemen - Algorithmen für den rechnerunterstützten Entwurf hochintegrierter Schaltungen. |
|
1993 |
RDF |
|
| 1 | Peter Marwedel |
Tree-based mapping of algorithms to predefined structures. |
ICCAD |
1993 |
DBLP DOI BibTeX RDF |
|
| 1 | Peter Marwedel, Wolfgang Rosenstiel |
Synthese von Register-Transfer-Strukturen aus Verhaltensbeschriebungen. |
Informatik Spektrum |
1992 |
DBLP BibTeX RDF |
|
| 1 | Peter Marwedel |
Implementations of IF-statements in the TODOS microarchitecture synthesis system. |
Synthesis for Control Dominated Circuits |
1992 |
DBLP BibTeX RDF |
|
| 1 | Peter Marwedel |
Matching system and component behaviour in MIMOLA synthesis tools. |
EURO-DAC |
1990 |
DBLP DOI BibTeX RDF |
|
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