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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 5 occurrences of 5 keywords
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Results
Found 4 publication records. Showing 4 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Lei Wang, Markus Olbrich, Erich Barke, Thomas Büchner, Markus Bühler, Philipp V. Panitz |
A gate sizing method for glitch power reduction.  |
SoCC  |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Lei Wang, Markus Olbrich, Erich Barke, Thomas Büchner, Markus Bühler, Philipp V. Panitz |
A theoretical probabilistic simulation framework for dynamic power estimation. |
ICCAD |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Philipp V. Panitz, Markus Olbrich, Erich Barke, Markus Bühler, Jürgen Koehl |
Considering possible opens in non-tree topology wire delay calculation. |
ACM Great Lakes Symposium on VLSI |
2008 |
DBLP DOI BibTeX RDF |
non-tree topologies, yield, static timing analysis, delay analysis |
| 1 | Philipp V. Panitz, Markus Olbrich, Erich Barke, Jürgen Koehl |
Robust wiring networks for DfY considering timing constraints. |
ACM Great Lakes Symposium on VLSI |
2007 |
DBLP DOI BibTeX RDF |
redundant wiring, timing constraint aware, open defects, design for yield |
Displaying result #1 - #4 of 4 (100 per page; Change: )
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