| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Prith Banerjee, Rich Friedrich, Cullen Bash, P. Goldsack, Bernardo A. Huberman, J. Manley, Chandrakant D. Patel, Parthasarathy Ranganathan, A. Veitch |
Everything as a Service: Powering the New Information Economy.  |
IEEE Computer  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Dhruva R. Chakrabarti, Prithviraj Banerjee, Hans-Juergen Boehm, Pramod G. Joisha, Robert S. Schreiber |
The runtime abort graph and its application to software transactional memory optimization. |
CGO |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Pramod G. Joisha, Robert S. Schreiber, Prithviraj Banerjee, Hans-Juergen Boehm, Dhruva R. Chakrabarti |
A technique for the effective and automatic reuse of classical compiler optimizations on multithreaded code. |
POPL |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Prith Banerjee, Rich Friedrich, L. Morell |
Open Innovation at HP Labs. |
IEEE Computer |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Prith Banerjee |
An Intelligent IT Infrastructure for the Future. |
ICDCN |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Lei Gao, David Zaretsky, Gaurav Mittal, Dan Schonfeld, Prith Banerjee |
Automatic Generation of Stream Descriptors for Streaming Architectures. |
ICPP |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Lei Gao, David Zaretsky, Gaurav Mittal, Dan Schonfeld, Prith Banerjee |
A software pipelining algorithm in high-level synthesis for FPGA architectures. |
ISQED |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Prith Banerjee, Chandrakant D. Patel, Cullen Bash, Parthasarathy Ranganathan |
Sustainable data centers: enabled by supply and demand side management. |
DAC |
2009 |
DBLP DOI BibTeX RDF |
sustainability, data centers, exascale |
| 1 | Prith Banerjee |
An intelligent IT infrastructure for the future. |
HPCA |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Nikolaos D. Liveris, Hai Zhou, Prithviraj Banerjee |
Complete-k-distinguishability for retiming and resynthesis equivalence checking without restricting synthesis. |
ASP-DAC |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Gaurav Mittal, David Zaretsky, Prithviraj Banerjee |
Streaming implementation of a sequential decompression algorithm on an FPGA. |
FPGA |
2009 |
DBLP DOI BibTeX RDF |
fix., fpga, system-on-chip, binary translation, hardware-software co-design, streaming architecture |
| 1 | David Zaretsky, Gaurav Mittal, Prithviraj Banerjee |
Streaming Implementation of the ZLIB Decoder Algorithm on an FPGA. |
ISCAS |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Lei Gao, Gaurav Mittal, David Zaretsky, Dan Schonfeld, Prithviraj Banerjee |
An Automated Algorithm to Generate Stream Programs. |
ISCAS |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Nikolaos D. Liveris, Hai Zhou, Robert P. Dick, Prithviraj Banerjee |
State space abstraction for parameterized self-stabilizing embedded systems. |
EMSOFT |
2008 |
DBLP DOI BibTeX RDF |
verification, abstraction, parameterized systems, self-stabilizing systems, network invariants |
| 1 | Nikolaos D. Liveris, Hai Zhou, Prithviraj Banerjee |
A dynamic-programming algorithm for reducing the energy consumption of pipelined System-Level streaming applications. |
ASP-DAC |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | David Zaretsky, Gaurav Mittal, Robert P. Dick, Prith Banerjee |
Balanced Scheduling and Operation Chaining in High-Level Synthesis for FPGA Designs. |
ISQED |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Pramod G. Joisha, Prithviraj Banerjee |
A translator system for the MATLAB language. |
Softw., Pract. Exper. |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Arindam Mallik, Debjit Sinha, Prithviraj Banerjee, Hai Zhou |
Low-Power Optimization by Smart Bit-Width Allocation in a SystemC-Based ASIC Design Environment. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Gaurav Mittal, David Zaretsky, Xiaoyong Tang, Prithviraj Banerjee |
An Overview of a Compiler for Mapping Software Binaries to Hardware. |
IEEE Trans. VLSI Syst. |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Nikolaos D. Liveris, Chuan Lin, J. Wang, Hai Zhou, Prithviraj Banerjee |
Retiming for Synchronous Data Flow Graphs. |
ASP-DAC |
2007 |
DBLP DOI BibTeX RDF |
cycle length, synchronous data flow graphs, retiming |
| 1 | David Zaretsky, Gaurav Mittal, Robert P. Dick, Prith Banerjee |
Dynamic Template Generation for Resource Sharing in Control and Data Flow Graphs. |
VLSI Design |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Pramod G. Joisha, Prithviraj Banerjee |
An algebraic array shape inference system for MATLAB. |
ACM Trans. Program. Lang. Syst. |
2006 |
DBLP DOI BibTeX RDF |
Typeless array languages, shape algebras, term rewriting |
| 1 | Arindam Mallik, Debjit Sinha, Prithviraj Banerjee, Hai Zhou |
Smart bit-width allocation for low power optimization in a systemc based ASIC design environment. |
DATE |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Sanghamitra Roy, Prith Banerjee |
An Algorithm for Trading Off Quantization Error with Hardware Resources for MATLAB-Based FPGA Design. |
IEEE Trans. Computers |
2005 |
DBLP DOI BibTeX RDF |
field programmable gate arrays, Automation, quantization, floating-point arithmetic, fixed-point arithmetic |
| 1 | Gaurav Mittal, David Zaretsky, Gokhan Memik, Prith Banerjee |
Automatic extraction of function bodies from software binaries. |
ASP-DAC |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | David Zaretsky, Gaurav Mittal, Robert P. Dick, Prith Banerjee |
Generation of Control and Data Flow Graphs from Scheduled and Pipelined Assembly Code. |
LCPC |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Xiaoyong Tang, Tianyi Jiang, Alex K. Jones, Prithviraj Banerjee |
High-Level Synthesis for Low Power Hardware Implementation of Unscheduled Data-Dominated Circuits. |
J. Low Power Electronics |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Nikolaos D. Liveris, Hai Zhou, Prithviraj Banerjee |
An Efficient System-Level to RTL Verification Framework for Computation-Intensive Applications. |
Asian Test Symposium |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Xiaoyong Tang, Hai Zhou, Prithviraj Banerjee |
Leakage power optimization with dual-Vth library in high-level synthesis. |
DAC |
2005 |
DBLP DOI BibTeX RDF |
dual-Vth, optimization, high-level synthesis, leakage power |
| 1 | Xiaoyong Tang, Tianyi Jiang, Alex K. Jones, Prithviraj Banerjee |
Behavioral Synthesis of Data-Dominated Circuits for Minimal Energy Implementation. |
VLSI Design |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Prithviraj Banerjee, Malay Haldar, Anshuman Nayak, Victor Kim, Vikram Saxena, Steven Parkes, Debabrata Bagchi, Satrajit Pal, Nikhil Tripathi, David Zaretsky, R. Anderson, J. R. Uribe |
Overview of a compiler for synthesizing MATLAB programs onto FPGAs. |
IEEE Trans. VLSI Syst. |
2004 |
DBLP BibTeX RDF |
|
| 1 | Rajarshi Mukherjee, Alex K. Jones, Prithviraj Banerjee |
Handling Data Streams while Compiling C Programs onto Hardware. |
ISVLSI |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | David Zaretsky, Gaurav Mittal, Xiaoyong Tang, Prithviraj Banerjee |
Evaluation of scheduling and allocation algorithms while mapping assembly code onto FPGAs. |
ACM Great Lakes Symposium on VLSI |
2004 |
DBLP DOI BibTeX RDF |
scheduling, optimizations, FPGAs, compilers, binary translation, chaining, hardware synthesis |
| 1 | Tianyi Jiang, Xiaoyong Tang, Prithviraj Banerjee |
Macro-models for high level area and power estimation on FPGAs. |
ACM Great Lakes Symposium on VLSI |
2004 |
DBLP DOI BibTeX RDF |
model, FPGA, high-level synthesis, power estimation, RTL, area estimation |
| 1 | Sanghamitra Roy, Prithviraj Banerjee |
An algorithm for converting floating-point computations to fixed-point in MATLAB based FPGA design. |
DAC |
2004 |
DBLP DOI BibTeX RDF |
quantization, quantizer, floating point, fixed point |
| 1 | Gaurav Mittal, David Zaretsky, Xiaoyong Tang, Prithviraj Banerjee |
Automatic translation of software binaries onto FPGAs. |
DAC |
2004 |
DBLP DOI BibTeX RDF |
compiler, reconfigurable computing, binary translation, hardware-software co-design, decompilation |
| 1 | David Zaretsky, Gaurav Mittal, Xiaoyong Tang, Prithviraj Banerjee |
Overview of the FREEDOM Compiler for Mapping DSP Software to FPGAs. |
FCCM |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Sanghamitra Roy, Debjit Sinha, Prithviraj Banerjee |
An algorithm for trading off quantization error with hardware resources for MATLAB based FPGA design. |
FPGA |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Tianyi Jiang, Xiaoyong Tang, Prithviraj Banerjee |
High level area, delay and power estimation for FPGAs. |
FPGA |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Nikolaos D. Liveris, Prithviraj Banerjee |
Power Aware Interface Synthesis for Bus-Based SoC Design. |
DATE |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee |
Reducing False Sharing and Improving Spatial Locality in a Unified Compilation Framework. |
IEEE Trans. Parallel Distrib. Syst. |
2003 |
DBLP DOI BibTeX RDF |
loop and memory layout transformations, shared-memory multiprocessors, Data reuse, cache locality, false sharing |
| 1 | Amitabh Mishra, Prithviraj Banerjee |
An Algorithm-Based Error Detection Scheme for the Multigrid Method. |
IEEE Trans. Computers |
2003 |
DBLP DOI BibTeX RDF |
rounding error analysis, parallel, error detection, partial differential equations, Algorithm-Based Fault Tolerance, multigrid method |
| 1 | Pramod G. Joisha, Prithviraj Banerjee |
Static array storage optimization in MATLAB. |
PLDI |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Alex K. Jones, Prithviraj Banerjee |
An Automated and Power-Aware Framework for Utilization of IP Cores in Hardware Generated from C Descriptions Targeting FPGAs. (PDF / PS) |
FCCM |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Prithviraj Banerjee, Debabrata Bagchi, Malay Haldar, Anshuman Nayak, Victor Kim, R. Uribe |
Automatic Conversion of Floating Point MATLAB Programs into Fixed Point FPGA Based Hardware Design. (PDF / PS) |
FCCM |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Alex K. Jones, Prithviraj Banerjee |
An automated and power-aware framework for utilization of IP cores in hardware generated from C descriptions targeting FPGAs. |
FPGA |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Prithviraj Banerjee, Vikram Saxena, J. R. Uribe, Malay Haldar, Anshuman Nayak, Victor Kim, Debabrata Bagchi, Satrajit Pal, Nikhil Tripathi, R. Anderson |
Making area-performance tradeoffs at the high level using the AccelFPGA compiler for FPGAs. |
FPGA |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Pramod G. Joisha, Prithviraj Banerjee |
The MAGICA Type Inference Engine for MATLAB. |
CC |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Venkatram Krishnaswamy, Gagan Hasteer, Prithviraj Banerjee |
Automatic Parallelization of Compiled Event Driven VHDL Simulation. |
IEEE Trans. Computers |
2002 |
DBLP DOI BibTeX RDF |
scheduling, partitioning, VHDL, multithreading, automatic parallelization, event driven simulation, compiled simulation |
| 1 | Prithviraj Banerjee, Malay Haldar, Anshuman Nayak, Victor Kim, Debabrata Bagchi, Satrajit Pal, Nikhil Tripathi |
A Behavioral Synthesis Tool for Exploiting Fine Grain Parallelism in FPGAs. |
IWDC |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Alex K. Jones, Debabrata Bagchi, Satrajit Pal, Xiaoyong Tang, Alok N. Choudhary, Prithviraj Banerjee |
PACT HDL: a C compiler targeting ASICs and FPGAs with power and performance optimizations. |
CASES |
2002 |
DBLP DOI BibTeX RDF |
FPGA, low-power, compiler, SoC, synthesis, pipelining, VHDL, IP, ASIC, high-performance, FSM, Verilog, HDL, levelization |
| 1 | Anshuman Nayak, Malay Haldar, Alok N. Choudhary, Prithviraj Banerjee |
Accurate Area and Delay Estimators for FPGAs. |
DATE |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Dhruva R. Chakrabarti, Prithviraj Banerjee |
Static Single Assignment Form for Message-Passing Programs. |
International Journal of Parallel Programming |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Mahmut T. Kandemir, Prithviraj Banerjee, Alok N. Choudhary, J. Ramanujam, Eduard Ayguadé |
Static and Dynamic Locality Optimizations Using Integer Linear Programming. |
IEEE Trans. Parallel Distrib. Syst. |
2001 |
DBLP DOI BibTeX RDF |
cache miss estimation, compiler optimizations, integer linear programming, Data reuse, cache locality, memory layouts |
| 1 | Pramod G. Joisha, Prithviraj Banerjee |
The Efficient Computation of Ownership Sets in HPF. |
IEEE Trans. Parallel Distrib. Syst. |
2001 |
DBLP DOI BibTeX RDF |
array alignment, array distribution, ownership set, Fourier-Motzkin Elimination technique, parallelizing compiler, HPF |
| 1 | U. Nagaraj Shenoy, Alok N. Choudhary, Prithviraj Banerjee |
An algorithm for synthesis of large time-constrained heterogeneous adaptive systems. |
ACM Trans. Design Autom. Electr. Syst. |
2001 |
DBLP DOI BibTeX RDF |
delay/cost table, hierarchical control data-flow graph, time-constrained synthesis, pipelining, reconfigurable computing, mixed integer linear programming, list scheduling |
| 1 | Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary, Prithviraj Banerjee |
A Layout-Conscious Iteration Space Transformation Technique. |
IEEE Trans. Computers |
2001 |
DBLP DOI BibTeX RDF |
program optimization, loop transformations, Data reuse, cache locality, memory layouts |
| 1 | Yanhong Yuan, Prithviraj Banerjee |
A Parallel Implementation of a Fast Multipole-Based 3-D Capacitance Extraction Program on Distributed Memory Multicomputers. |
J. Parallel Distrib. Comput. |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Pramod G. Joisha, Abhay Kanhere, Prithviraj Banerjee, U. Nagaraj Shenoy, Alok N. Choudhary |
Handling context-sensitive syntactic issues in the design of a front-end for a MATLAB compiler. |
ACM SIGAPL APL Quote Quad |
2001 |
DBLP DOI BibTeX RDF |
colon expressions, command-form function invocations, control constructs, single quote character, syntax analysis for MATLAB, assignments, matrices |
| 1 | Pramod G. Joisha, Prithviraj Banerjee |
Correctly detecting intrinsic type errors in typeless languages such as MATLAB. |
APL |
2001 |
DBLP DOI BibTeX RDF |
APL, MATLAB |
| 1 | Daniel J. Palermo, Eugene W. Hodges IV, Prithviraj Banerjee |
Compiler Optimization of Dynamic Data Distributions for Distributed-Memory Multicomputers. |
Compiler Optimizations for Scalable Parallel Systems Languages |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee |
Automated synthesis of pipelined designs on FPGAs for signal and image processing applications described in MATLAB. |
ASP-DAC |
2001 |
DBLP DOI BibTeX RDF |
MATLAB |
| 1 | Dhruva R. Chakrabarti, Prithviraj Banerjee |
Global optimization techniques for automatic parallelization of hybrid applications. |
ICS |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee, U. Nagaraj Shenoy |
Fpga Hardware Synthesis From Matlab. |
VLSI Design |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | U. Nagaraj Shenoy, Prithviraj Banerjee, Alok N. Choudhary, Mahmut T. Kandemir |
Efficient Synthesis of Array Intensive Computations onto FPGA Based Accelerators. |
VLSI Design |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Anshuman Nayak, Malay Haldar, Alok N. Choudhary, Prithviraj Banerjee |
Precision and error analysis of MATLAB applications during automated hardware synthesis for FPGAs. |
DATE |
2001 |
DBLP DOI BibTeX RDF |
MATLAB |
| 1 | Pramod G. Joisha, U. Nagaraj Shenoy, Prithviraj Banerjee |
Computing Array Shapes in MATLAB. |
LCPC |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee |
A System for Synthesizing Optimized FPGA Hardware from MATLAB. |
ICCAD |
2001 |
DBLP BibTeX RDF |
|
| 1 | Antonio Lain, Dhruva R. Chakrabarti, Prithviraj Banerjee |
Compiler and Run-Time Support for Exploiting Regularity within Irregular Applications. |
IEEE Trans. Parallel Distrib. Syst. |
2000 |
DBLP DOI BibTeX RDF |
compiler support, runtime compilation, iterative, distributed memory multicomputers, runtime support, Irregular applications |
| 1 | Mahmut T. Kandemir, Alok N. Choudhary, Prithviraj Banerjee, J. Ramanujam, U. Nagaraj Shenoy |
Minimizing Data and Synchronization Costs in One-Way Communication. |
IEEE Trans. Parallel Distrib. Syst. |
2000 |
DBLP DOI BibTeX RDF |
One-way communication, redundant synchronization, linear algebra techniques, message-passing, compiler optimizations, data-flow analysis, data-parallel languages |
| 1 | Pramod G. Joisha, Prithviraj Banerjee |
Correctly detecting intrinsic type errors in typeless languages such as MATLAB. |
ACM SIGAPL APL Quote Quad |
2000 |
DBLP DOI BibTeX RDF |
APL, MATLAB |
| 1 | Zhi Alex Ye, Andreas Moshovos, Scott Hauck, Prithviraj Banerjee |
CHIMAERA: a high-performance architecture with a tightly-coupled reconfigurable functional unit. |
ISCA |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee |
Parallel algorithms for FPGA placement. |
ACM Great Lakes Symposium on VLSI |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Majid Sarrafzadeh, Prithviraj Banerjee, Kaushik Roy (eds.) |
Proceedings of the 10th ACM Great Lakes Symposium on VLSI 2000, Chicago, Illinois, USA, March 2-4, 2000 |
ACM Great Lakes Symposium on VLSI |
2000 |
DBLP BibTeX RDF |
|
| 1 | Yanhong Yuan, Prithviraj Banerjee |
A Parallel Implementation of a Fast Multipole Based 3-D Capacitance Extraction Program on Distributed Memory Multicomputer. (PDF / PS) |
IPDPS |
2000 |
DBLP DOI BibTeX RDF |
fast multipole algorithm, parallel algorithms, distributed memory multiprocessors, Capacitance extraction |
| 1 | Victor Kim, Prithviraj Banerjee, Kaushik De |
Fine-Grained Parallel VLSI Synthesis for Commercial CAD on a Network of Workstations. (PDF / PS) |
ICPP |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Malay Haldar, Anshuman Nayak, Abhay Kanhere, Pramod G. Joisha, U. Nagaraj Shenoy, Alok N. Choudhary, Prithviraj Banerjee |
Match Virtual Machine: An Adaptive Runtime System to Execute MATLAB in Parallel. (PDF / PS) |
ICPP |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee |
Scheduling algorithms for automated synthesis of pipelined designs on FPGAs for applications described in MATLAB. |
CASES |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Prithviraj Banerjee, U. Nagaraj Shenoy, Alok N. Choudhary, Scott Hauck, C. Bachmann, Malay Haldar, Pramod G. Joisha, Alex K. Jones, Abhay Kanhere, Anshuman Nayak, S. Periyacheri, M. Walkden, David Zaretsky |
A MATLAB Compiler for Distributed, Heterogeneous, Reconfigurable Computing Systems. |
FCCM |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhi Alex Ye, U. Nagaraj Shenoy, Prithviraj Banerjee |
A C compiler for a processor with a reconfigurable functional unit. |
FPGA |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | U. Nagaraj Shenoy, Prithviraj Banerjee, Alok N. Choudhary |
A System-Level Synthesis Algorithm with Guaranteed Solution Quality. |
DATE |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Pramod G. Joisha, Prithviraj Banerjee |
Exploiting Ownership Sets in HPF. |
LCPC |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Yanhong Yuan, Prithviraj Banerjee |
Comparative Study of Parallel Algorithms for 3-D Capacitance Extraction on Distributed Memory Multiprocessors. (PDF / PS) |
ICCD |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Mahmut T. Kandemir, Alok N. Choudhary, U. Nagaraj Shenoy, Prithviraj Banerjee, J. Ramanujam |
A Linear Algebra Framework for Automatic Determination of Optimal Data Layouts. |
IEEE Trans. Parallel Distrib. Syst. |
1999 |
DBLP DOI BibTeX RDF |
array restructuring, parallelism, Data reuse, spatial locality, memory performance, locality optimizations |
| 1 | Pradeep Prabhakaran, Prithviraj Banerjee |
Parallel Algorithms for Force Directed Scheduling of Flattened and Hierarchical Signal Flow Graphs. |
IEEE Trans. Computers |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | John A. Chandy, Prithviraj Banerjee |
A Parallel Circuit-Partitioned Algorithm for Timing-Driven Standard Cell Placement. |
J. Parallel Distrib. Comput. |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee |
A Matrix-Based Approach to Global Locality Optimization. |
J. Parallel Distrib. Comput. |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Mahmut T. Kandemir, Prithviraj Banerjee, Alok N. Choudhary, J. Ramanujam, U. Nagaraj Shenoy |
A global communication optimization technique based on data-flow analysis and linear algebra. |
ACM Trans. Program. Lang. Syst. |
1999 |
DBLP DOI BibTeX RDF |
message vectorization, parallelism, global optimizations, data-flow analysis, communication optimizations, distributed-memory machines |
| 1 | Prithviraj Banerjee, Viktor K. Prasanna, Bhabani P. Sinha (eds.) |
High Performance Computing - HiPC'99, 6th International Conference, Calcutta, India, December 17-20, 1999, Proceedings |
HiPC |
1999 |
DBLP BibTeX RDF |
|
| 1 | Yanhong Yuan, Prithviraj Banerjee |
A Parallel 3-D Capacitance Extraction Program. |
HiPC |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee |
On Reducing False Sharing while Improving Locality on Shared Memory Multiprocessors. |
IEEE PACT |
1999 |
DBLP DOI BibTeX RDF |
loop and memory layout transformations, shared-memory multiprocessors, data reuse, cache locality, false sharing |
| 1 | Yanhong Yuan, Prithviraj Banerjee |
ICE: Incremental 3-Dimensional Capacitance and Resistance Extraction for an Iterative Design Environment. |
Great Lakes Symposium on VLSI |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Jim E. Crenshaw, Majid Sarrafzadeh, Prithviraj Banerjee, Pradeep Prabhakaran |
An Incremental Floorplanner. |
Great Lakes Symposium on VLSI |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Yanhong Yuan, Prithviraj Banerjee |
Incremental capacitance extraction and its application to iterative timing-driven detailed routing. |
ISPD |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Pramod G. Joisha, Prithviraj Banerjee |
PARADIGM (version 2.0): A New HPF Compilation System. (PDF / PS) |
IPPS/SPDP |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Dhruva R. Chakrabarti, Prithviraj Banerjee |
A Novel Compilation Framework for Supporting Semi-Regular Distributions in Hybrid Applications. (PDF / PS) |
IPPS/SPDP |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee |
A Graph Based Framework to Detect Optimal Memory Layouts for Improving Data Locality. (PDF / PS) |
IPPS/SPDP |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Sumit Roy, Krishna P. Belkhale, Prithviraj Banerjee |
An Approxmimate Algorithm for Delay-Constraint Technology Mapping. |
DAC |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee |
A Framework for Interprocedural Locality Optimization Using Both Loop and Data Layout Transformations. (PDF / PS) |
ICPP |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Mahmut T. Kandemir, Prithviraj Banerjee, Alok N. Choudhary, J. Ramanujam, Eduard Ayguadé |
An integer linear programming approach for optimizing cache locality. |
International Conference on Supercomputing |
1999 |
DBLP DOI BibTeX RDF |
|
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