Search results for "Qiang Zhou"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Wenchao Gao, Qiang Zhou, Xu Qian, Yici Cai	A DyadicCluster method used for nonlinear placement.	ISQED	2012	DBLP DOI BibTeX RDF
1	Zuowei Li, Yuchun Ma, Qiang Zhou, Yici Cai, Yu Wang, Tingting Huang, Yuan Xie	Thermal-aware power network design for IR drop reduction in 3D ICs.	ASP-DAC	2012	DBLP DOI BibTeX RDF
1	Qiang Zhou, Jin Shi, Bin Liu 0007, Yici Cai	Floorplanning Considering IR Drop in Multiple Supply Voltages Island Designs.	IEEE Trans. VLSI Syst.	2011	DBLP DOI BibTeX RDF
1	Yun-Hao Yuan, Quan-Sen Sun, Qiang Zhou, De-Shen Xia	A novel multiset integrated canonical correlation analysis framework and its application in feature fusion.	Pattern Recognition	2011	DBLP DOI BibTeX RDF
1	Zhongdong Qi, Qiang Zhou, Yanming Jia, Yici Cai, Zhuoyuan Li, Hailong Yao	A novel fine-grain track routing approach for routability and crosstalk optimization.	ISQED	2011	DBLP DOI BibTeX RDF
1	Qiang Gao, Hailong Yao, Qiang Zhou, Yici Cai	A novel detailed routing algorithm with exact matching constraint for analog and mixed signal circuits.	ISQED	2011	DBLP DOI BibTeX RDF
1	Shuzhe Zhou, Hailong Yao, Qiang Zhou, Yici Cai	Minimization of Circuit Delay and Power through Gate Sizing and Threshold Voltage Assignment.	ISVLSI	2011	DBLP DOI BibTeX RDF
1	Limin Zhu, Jinian Bian, Qiang Zhou, Yici Cai	A fast recursive detailed routing algorithm for hierarchical FPGAs.	CSCWD	2011	DBLP DOI BibTeX RDF
1	Fan Yang, Hailong Yao, Qiang Zhou, Yici Cai	SIAR: splitting-graph-based interactive analog router.	ACM Great Lakes Symposium on VLSI	2011	DBLP DOI BibTeX RDF
1	Feifei Niu, Qiang Zhou, Hailong Yao, Yici Cai, Jianlei Yang, Chin-Ngai Sze	Obstacle-avoiding and slew-constrained buffered clock tree synthesis for skew optimization.	ACM Great Lakes Symposium on VLSI	2011	DBLP DOI BibTeX RDF
1	Qiang Zhou, Chunming Gao, Zhigang Meng	The Bounded Rationality Model-Based Game Intelligent Decision-Making Method.	AICI	2011	DBLP DOI BibTeX RDF
1	Qiang Zhou, Shifeng Chen, Jianzhuang Liu, Xiaoou Tang	Edge-preserving single image super-resolution.	ACM Multimedia	2011	DBLP DOI BibTeX RDF
1	Jianlei Yang, Zuowei Li, Yici Cai, Qiang Zhou	PowerRush: A linear simulator for power grid.	ICCAD	2011	DBLP DOI BibTeX RDF
1	Jianlei Yang, Yici Cai, Qiang Zhou, Jin Shi	Fast poisson solver preconditioned method for robust power grid analysis.	ICCAD	2011	DBLP DOI BibTeX RDF
1	Yuchun Ma, Qiang Zhou, Pingqiang Zhou, Xianlong Hong	Thermal Impacts of Leakage Power in 2D/3D floorplanning.	Journal of Circuits, Systems, and Computers	2010	DBLP DOI BibTeX RDF
1	Yin Shen, Qiang Zhou, Yici Cai, Xianlong Hong	ECP- and CMP-Aware Detailed Routing Algorithm for DFM.	IEEE Trans. VLSI Syst.	2010	DBLP DOI BibTeX RDF
1	Hui Dai, Qiang Zhou, Jinian Bian	Multilevel Optimization for Large-Scale Hierarchical FPGA Placement.	J. Comput. Sci. Technol.	2010	DBLP DOI BibTeX RDF
1	Weixiang Shen, Yici Cai, Wei Chen, Yongqiang Lu, Qiang Zhou, Jiang Hu	Useful clock skew optimization under a multi-corner multi-mode design framework.	ISQED	2010	DBLP DOI BibTeX RDF
1	Dawei Liu, Qiang Zhou, Yongqiang Lu, Jinian Bian	A low power clock network placement framework.	ISQED	2010	DBLP DOI BibTeX RDF
1	Qiang Zhou, Li Song, Wenjun Zhang	Video Coding With Key Frames Guided Super-Resolution.	PCM	2010	DBLP DOI BibTeX RDF
1	Wei Fu, Ziqi Guo, Qiang Zhou, Caixia Liu, Baogang Zhang	Using local transition probability models in Markov Random Field for multi-temporal image classification.	IGARSS	2010	DBLP DOI BibTeX RDF
1	Qiang Zhou, Peng Gong, Ziqi Guo, Caixia Liu, Wei Fu, Baogang Zhang	A simplified image fusion technique with sensor spectral response.	IGARSS	2010	DBLP DOI BibTeX RDF
1	Limin Zhu, Qiang Zhou, Yici Cai, Jinian Bian	An architecture-aware routing optimization via satisfiabilty for hierarchical FPGA.	CSCWD	2010	DBLP DOI BibTeX RDF
1	Jinian Bian, Qiang Zhou, Peter Athanas, Yajun Ha, Kang Zhao (eds.)	Proceedings of the International Conference on Field-Programmable Technology, FPT 2010, 8-10 December 2010, Tsinghua University, Beijing, China	FPT	2010	DBLP BibTeX RDF
1	Fan Yang, Yici Cai, Qiang Zhou, Jiang Hu	SAT based multi-net rip-up-and-reroute for manufacturing hotspot removal.	DATE	2010	DBLP BibTeX RDF
1	Junbo Yu, Qiang Zhou, Gang Qu, Jinian Bian	Behavioral level dual-vth design for reduced leakage power with thermal awareness.	DATE	2010	DBLP BibTeX RDF
1	Junjun Gu, Gang Qu, Lin Yuan, Qiang Zhou	Peak current reduction by simultaneous state replication and re-encoding.	ICCAD	2010	DBLP DOI BibTeX RDF
1	Junbo Yu, Qiang Zhou, Gang Qu, Jinian Bian	Peak Temperature Reduction by Physical Information Driven Behavioral Synthesis with Resource Usage Allocation.	IEICE Transactions	2009	DBLP BibTeX RDF
1	Qiang Zhou, Xin Zhao, Yici Cai, Xianlong Hong	An MTCMOS technology for low-power physical design.	Integration	2009	DBLP DOI BibTeX RDF
1	Haixia Yan, Qiang Zhou, Xianlong Hong	Thermal aware placement in 3D ICs using quadratic uniformity modeling approach.	Integration	2009	DBLP DOI BibTeX RDF
1	Dawei Liu, Qiang Zhou, Jinian Bian, Yici Cai, Xianlong Hong	Cell shifting aware of wirelength and overlap.	ISQED	2009	DBLP DOI BibTeX RDF
1	Qiang Zhou, Xunxue Cui, Zhengshan Wang, Bin Yang	A hybrid optimization algorithm for the job-shop scheduling problem.	GEC Summit	2009	DBLP DOI BibTeX RDF	job-shop problem, genetic algorithm, genetic programming, chaos, scheduling optimization
1	Junjun Gu, Gang Qu, Qiang Zhou	Information hiding for trusted system design.	DAC	2009	DBLP DOI BibTeX RDF	VLSI design intellectual property, constraint manipulation, trusted IC, graph coloring, information hiding
1	Junbo Yu, Qiang Zhou, Jinian Bian	Peak temperature control in thermal-aware behavioral synthesis through allocating the number of resources.	ASP-DAC	2009	DBLP DOI BibTeX RDF
1	Juanjuan Chen, Xing Wei, Yunjian Jiang, Qiang Zhou	Improve clock gating through power-optimal enable function selection.	DDECS	2009	DBLP DOI BibTeX RDF
1	Jinpeng Zhao, Qiang Zhou, Yici Cai	Fast congestion-aware timing-driven placement for island FPGA.	DDECS	2009	DBLP DOI BibTeX RDF
1	Dawei Liu, Qiang Zhou, Jinian Bian, Yanming Jia	Global density smoothing technique for analytical placement algorithm.	CAD/Graphics	2009	DBLP DOI BibTeX RDF
1	Hui Dai, Qiang Zhou, Yici Cai, Jinian Bian, Xianlong Hong	Fast placement for large-scale hierarchical FPGAs.	CAD/Graphics	2009	DBLP DOI BibTeX RDF
1	Yun Huang, Qiang Zhou, Yici Cai, Haixia Yan	A thermal-driven force-directed floorplanning algorithm for 3D ICs.	CAD/Graphics	2009	DBLP DOI BibTeX RDF
1	Xiaoyi Wang, Yici Cai, Qiang Zhou, Sheldon X.-D. Tan, Thom Jefferson A. Eguia	Decoupling capacitance efficient placement for reducing transient power supply noise.	ICCAD	2009	DBLP BibTeX RDF
1	Liangpeng Guo, Yici Cai, Qiang Zhou, Xianlong Hong	Logic and Layout Aware Level Converter Optimization for Multiple Supply Voltage.	IEICE Transactions	2008	DBLP DOI BibTeX RDF
1	Yici Cai, Qiang Zhou, Xianlong Hong, Rui Shi, Yang Wang	Application of optical proximity correction technology.	Science in China Series F: Information Sciences	2008	DBLP DOI BibTeX RDF	layout, rules-based, OPC, model-based, IC
1	Haixia Yan, Qiang Zhou, Xianlong Hong	Efficient Thermal Aware Placement Approach Integrated with 3D DCT Placement Algorithm.	ISQED	2008	DBLP DOI BibTeX RDF	placement, DCT, 3D, thermal
1	Yin Shen, Yici Cai, Qiang Zhou, Xianlong Hong	DFM Based Detailed Routing Algorithm for ECP and CMP.	ISQED	2008	DBLP DOI BibTeX RDF	ECP, CMP, DFM, detailed routing
1	Xing Wei, Juanjuan Chen, Qiang Zhou, Yici Cai, Jinian Bian, Xianlong Hong	MacroMap: A technology mapping algorithm for heterogeneous FPGAs with effective area estimation.	FPL	2008	DBLP DOI BibTeX RDF
1	Liangpeng Guo, Yici Cai, Qiang Zhou, Le Kang, Xianlong Hong	A novel performance driven power gating based on distributed sleep transistor network.	ACM Great Lakes Symposium on VLSI	2008	DBLP DOI BibTeX RDF	physical design, power-gating, sleep transistors
1	Qiang Zhou	A Computational Framework to Integrate Different Semantic Resources.	TSD	2008	DBLP DOI BibTeX RDF
1	Yanfeng Wang, Qiang Zhou, Yici Cai, Jiang Hu, Xianlong Hong, Jinian Bian	Low power clock buffer planning methodology in F-D placement for large scale circuit design.	ASP-DAC	2008	DBLP DOI BibTeX RDF
1	Qiang Zhou, Changwen Qu, Feng Su, Ying Wang	A New Approach of Extended Chirp Scaling Algorithm for High Squint Missile-Borne SAR Data Processing.	ISCSCT	2008	DBLP DOI BibTeX RDF
1	Qiang Zhou, Jiuqiang Han	Research of Time-frequency Analysis Method of Nonstationary Periodic Signal.	RAM	2008	DBLP DOI BibTeX RDF
1	Yici Cai, Bin Liu 0007, Qiang Zhou, Xianlong Hong	Voltage Island Generation in Cell Based Dual-Vdd Design.	IEICE Transactions	2007	DBLP DOI BibTeX RDF
1	Zhuoyuan Li, Xianlong Hong, Qiang Zhou, Shan Zeng, Jinian Bian, Wenjian Yu, Hannah Honghua Yang, Vijay Pitchumani, Chung-Kuan Cheng	Efficient Thermal via Planning Approach and Its Application in 3-D Floorplanning.	IEEE Trans. on CAD of Integrated Circuits and Systems	2007	DBLP DOI BibTeX RDF
1	Qiang Zhou, Yici Cai, Duo Li, Xianlong Hong	A Yield-Driven Gridless Router.	J. Comput. Sci. Technol.	2007	DBLP DOI BibTeX RDF	gridless routing, integrated circuit layout, critical area, design for yield
1	Yongqiang Lu, Xianlong Hong, Qiang Zhou, Yici Cai, Jun Gu	An efficient quadratic placement based on search space traversing technology.	Integration	2007	DBLP DOI BibTeX RDF
1	Yici Cai, Bin Liu 0007, Jin Shi, Qiang Zhou, Xianlong Hong	Power Delivery Aware Floorplanning for Voltage Island Designs.	ISQED	2007	DBLP DOI BibTeX RDF
1	Zhipeng Liu, Jinian Bian, Qiang Zhou, Hui Dai	Interconnect Delay and Power Optimization by Module Duplication for Integration of High Level Synthesis and Floorplan.	ISVLSI	2007	DBLP DOI BibTeX RDF
1	Yue Zhuo, Hao Li, Qiang Zhou, Yici Cai, Xianlong Hong	New timing and routability driven placement algorithms for FPGA synthesis.	ACM Great Lakes Symposium on VLSI	2007	DBLP DOI BibTeX RDF	congestion driven placement, physical synthesis, timing driven placement, net weight
1	Huafeng Wu, Haiguang Chen, Qiang Zhou, Chuanshan Gao	Throughput Performance of Marine STDMA Ad-hoc Network.	SNPD	2007	DBLP DOI BibTeX RDF
1	Huafeng Wu, Han Peng, Qiang Zhou, Min Yang, Bing Sun, Bo Yu	P2P Multimedia Sharing over MANET.	MMM	2007	DBLP DOI BibTeX RDF	multimedia sharing, peer-to-peer, MANET, distributed computing
1	Yuchun Ma, Zhuoyuan Li, Jason Cong, Xianlong Hong, Glenn Reinman, Sheqin Dong, Qiang Zhou	Micro-architecture Pipelining Optimization with Throughput-Aware Floorplanning.	ASP-DAC	2007	DBLP DOI BibTeX RDF	graph-based approach, microarchitecture pipelining optimization, throughput-aware floorplanning, block pipelining, interconnect pipelining, graph-based algorithm, mixed integer linear programming, wire pipelining
1	Yi Zou, Yici Cai, Qiang Zhou, Xianlong Hong, Sheldon X.-D. Tan, Le Kang	Practical Implementation of Stochastic Parameterized Model Order Reduction via Hermite Polynomial Chaos.	ASP-DAC	2007	DBLP DOI BibTeX RDF	stochastic parameterized model order reduction, Hermite polynomial chaos, stochastic model order reduction algorithm, stochastic Hermite polynomials, stochastic interconnect analysis, nonGaussian input variations, implicit system representation, block matrix structure, Monte Carlo methods, linear equations
1	Liangpeng Guo, Yici Cai, Qiang Zhou, Xianlong Hong	Logic and Layout Aware Voltage Island Generation for Low Power Design.	ASP-DAC	2007	DBLP DOI BibTeX RDF
1	Yanfeng Wang, Qiang Zhou, Xianlong Hong, Yici Cai	Clock-Tree Aware Placement Based on Dynamic Clock-Tree Building.	ISCAS	2007	DBLP DOI BibTeX RDF
1	Haixia Yan, Zhuoyuan Li, Xianlong Hong, Qiang Zhou	Unified Quadratic Programming Approach For 3-D Mixed Mode Placement.	ISCAS	2007	DBLP DOI BibTeX RDF
1	Yanhua Wang, Qiang Zhou, Jinian Bian, Junhua Qu	VPH: Versatile Routability-Driven Place Algorithm for Hierarchical FPGAs Based on VPR.	CAD/Graphics	2007	DBLP DOI BibTeX RDF
1	Pingqiang Zhou, Yuchun Ma, Qiang Zhou, Xianlong Hong	Thermal Effects with Leakage Power Considered in 2D/3D Floorplanning.	CAD/Graphics	2007	DBLP DOI BibTeX RDF
1	Pingqiang Zhou, Yuchun Ma, Zhuoyuan Li, Robert P. Dick, Li Shang, Hai Zhou, Xianlong Hong, Qiang Zhou	3D-STAF: scalable temperature and leakage aware floorplanning for three-dimensional integrated circuits.	ICCAD	2007	DBLP DOI BibTeX RDF
1	Zhuoyuan Li, Xianlong Hong, Qiang Zhou, Jinian Bian, Hannah Honghua Yang, Vijay Pitchumani	Efficient thermal-oriented 3D floorplanning and thermal via planning for two-stacked-die integration.	ACM Trans. Design Autom. Electr. Syst.	2006	DBLP DOI BibTeX RDF	floorplanning, thermal, 3D IC
1	Yici Cai, Bin Liu 0007, Yan Xiong, Qiang Zhou, Xianlong Hong	Priority-Based Routing Resource Assignment Considering Crosstalk.	J. Comput. Sci. Technol.	2006	DBLP DOI BibTeX RDF	track reservation, routing, VLSI, crosstalk, resource assignment
1	Qiang Zhou, Limin Ma, David M. Chelberg	Adaptive object detection and recognition based on a feedback strategy.	Image Vision Comput.	2006	DBLP DOI BibTeX RDF
1	Ligang Li, Hailiang Peng, Qiang Zhou, Bo Liu, Yirong Wu, Hongjian You, Yu Huang 0002	Study of Nonlinear Magnification Method Based on Bezier Transformation.	IGARSS	2006	DBLP DOI BibTeX RDF
1	Qiang Zhou, Zhihua Xiong, Jie Zhang, Yongmao Xu	Hierarchical Neural Network Based Product Quality Prediction of Industrial Ethylene Pyrolysis Process.	ISNN	2006	DBLP DOI BibTeX RDF
1	Zhuoyuan Li, Xianlong Hong, Qiang Zhou, Shan Zeng, Jinian Bian, Hannah Honghua Yang, Vijay Pitchumani, Chung-Kuan Cheng	Integrating dynamic thermal via planning with 3D floorplanning algorithm.	ISPD	2006	DBLP DOI BibTeX RDF	3D floorplanning, thermal optimization, thermal via
1	Qiang Zhou, Limin Ma, Mehmet Celenk, David M. Chelberg	Object Detection and Recognition via Deformable Illumination and Deformable Shape.	ICIP	2006	DBLP DOI BibTeX RDF
1	Bin Liu 0007, Yici Cai, Qiang Zhou, Xianlong Hong	Power driven placement with layout aware supply voltage assignment for voltage island generation in Dual-Vdd designs.	ASP-DAC	2006	DBLP DOI BibTeX RDF
1	Qiang Zhou, Yi Zou, Yici Cai, Xianlong Hong	Variational Circuit Simulator based on a Unified Methodology using Arithmetic over Taylor Polynomials.	APCCAS	2006	DBLP DOI BibTeX RDF
1	Lijuan Luo, Qiang Zhou, Yici Cai, Xianlong Hong, Yibo Wang	A novel technique integrating buffer insertion into timing driven placement.	ISCAS	2006	DBLP DOI BibTeX RDF
1	Xin Zhao, Yici Cai, Qiang Zhou, Xianlong Hong	A novel low-power physical design methodology for MTCMOS.	ISCAS	2006	DBLP DOI BibTeX RDF
1	Mehmet Celenk, Qiang Zhou, Vermund Vetnes, Rakesh Godavari	Saliency field map construction for region-of-interest-based color image querying.	J. Electronic Imaging	2005	DBLP DOI BibTeX RDF
1	Yi Zou, Yici Cai, Qiang Zhou, Xianlong Hong, Sheldon X.-D. Tan	A Fast Delay Computation for the Hybrid Structured Clock Network.	IEICE Transactions	2005	DBLP DOI BibTeX RDF
1	Yongqiang Lu, Chin-Ngai Sze, Xianlong Hong, Qiang Zhou, Yici Cai, Liang Huang, Jiang Hu	Navigating Register Placement for Low Power Clock Network Design.	IEICE Transactions	2005	DBLP DOI BibTeX RDF
1	Bin Liu 0007, Yici Cai, Qiang Zhou, Xianlong Hong	Crosstalk and Congestion Driven Layer Assignment Algorithm.	IEICE Transactions	2005	DBLP DOI BibTeX RDF
1	Qiang Zhou, Limin Ma, David M. Chelberg, Jingbing Xue, Ellengene Peterson, Michael Rowe	A novel machine vision application for analysis and visualization of confocal microscopic images.	Mach. Vis. Appl.	2005	DBLP DOI BibTeX RDF	Image reconstruction, Image registration, Surface extraction
1	Yici Cai, Xin Zhao, Qiang Zhou, Xianlong Hong	Shielding Area Optimization Under the Solution of Interconnect Crosstalk.	J. Comput. Sci. Technol.	2005	DBLP DOI BibTeX RDF	middle shield insertion, crosstalk, inductive coupling
1	Hailong Yao, Yici Cai, Qiang Zhou, Xianlong Hong	Crosstalk-Aware Routing Resource Assignment.	J. Comput. Sci. Technol.	2005	DBLP DOI BibTeX RDF	track/layer assignment, routing, VLSI, interconnect, physical design, crosstalk
1	Qiang Zhou, Limin Ma, Mehmet Celenk, David M. Chelberg	Content-Based Image Retrieval Based on ROI Detection and Relevance Feedback.	Multimedia Tools Appl.	2005	DBLP DOI BibTeX RDF	color and wavelet saliencies, normalized projections, relevance feedback, similarity measure, region of interest (ROI), content-based image retrieval (CBIR)
1	Yici Cai, Bin Liu 0007, Qiang Zhou, Xianlong Hong	A Thermal Aware Floorplanning Algorithm Supporting Voltage Islands for Low Power SOC Design.	PATMOS	2005	DBLP DOI BibTeX RDF
1	Qinglang Luo, Xianlong Hong, Qiang Zhou, Yici Cai	A new algorithm for layout of dark field alternating phase shifting masks.	ACM Great Lakes Symposium on VLSI	2005	DBLP DOI BibTeX RDF	AltPSM, space division strategy, VLSI
1	Hailong Yao, Yici Cai, Xianlong Hong, Qiang Zhou	Improved multilevel routing with redundant via placement for yield and reliability.	ACM Great Lakes Symposium on VLSI	2005	DBLP DOI BibTeX RDF	redundant via, routing, VLSI, DFM, yield enhancement
1	Mehmet Celenk, Michael Brown, Yi Luo, Jason Kaufman, Limin Ma, Qiang Zhou	Human identification using correlation metrics of iris images.	Storage and Retrieval Methods and Applications for Multimedia	2005	DBLP DOI BibTeX RDF
1	Yongqiang Lu, Cliff C. N. Sze, Xianlong Hong, Qiang Zhou, Yici Cai, Liang Huang, Jiang Hu	Navigating registers in placement for clock network minimization.	DAC	2005	DBLP DOI BibTeX RDF	low power, placement, clock network, variation tolerance
1	Liang Huang, Yici Cai, Qiang Zhou, Xianlong Hong, Jiang Hu, Yongqiang Lu	Clock network minimization methodology based on incremental placement.	ASP-DAC	2005	DBLP DOI BibTeX RDF
1	Yi Zou, Qiang Zhou, Yici Cai, Xianlong Hong, Sheldon X.-D. Tan	Analysis of buffered hybrid structured clock networks.	ASP-DAC	2005	DBLP DOI BibTeX RDF
1	Yongqiang Lu, Cliff C. N. Sze, Xianlong Hong, Qiang Zhou, Yici Cai, Liang Huang, Jiang Hu	Register placement for low power clock network.	ASP-DAC	2005	DBLP DOI BibTeX RDF
1	Yici Cai, Bin Liu 0007, Xiong Yan, Qiang Zhou, Xianlong Hong	A Hybrid Genetic Algorithm and Application to the Crosstalk Aware Track Assignment Problem.	ICNC	2005	DBLP DOI BibTeX RDF
1	Zhuoyuan Li, Xianlong Hong, Qiang Zhou, Yici Cai, Jinian Bian, Hannal Yang, Prashant Saxena, Vijay Pitchumani	A divide-and-conquer 2.5-D floorplanning algorithm based on statistical wirelength estimation.	ISCAS	2005	DBLP DOI BibTeX RDF
1	Yici Cai, Bin Liu 0007, Qiang Zhou, Xianlong Hong	Integrated routing resource assignment for RLC crosstalk minimization.	ISCAS	2005	DBLP DOI BibTeX RDF
1	Lijuan Luo, Qiang Zhou, Xianlong Hong, Hanbin Zhou	Multi-stage Detailed Placement Algorithm for Large-Scale Mixed-Mode Layout Design.	ICCSA	2005	DBLP DOI BibTeX RDF
1	Yunfeng Wang, Jinian Bian, Xianlong Hong, Liu Yang, Qiang Zhou, Qiang Wu	A New Methodology of Integrating High Level Synthesis and Floorplan for SoC Design.	ICESS	2005	DBLP DOI BibTeX RDF
1	Qiang Zhou, Zushun Chen	Building a Situation-Based Language Knowledge Base.	CICLing	2005	DBLP DOI BibTeX RDF

Publications of "Qiang Zhou" ( http://dblp.L3S.de/Authors/Qiang_Zhou )