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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 36 occurrences of 20 keywords
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Results
Found 51 publication records. Showing 51 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Qingfeng Zhuge, Yibo Guo, Jingtong Hu, Wei-Che Tseng, Chun Jason Xue, Edwin Hsing-Mean Sha |
Minimizing Access Cost for Multiple Types of Memory Units in Embedded Systems Through Data Allocation and Scheduling.  |
IEEE Transactions on Signal Processing  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Jingtong Hu, Chun Jason Xue, Wei-Che Tseng, Qingfeng Zhuge, Yingchao Zhao, Edwin Hsing-Mean Sha |
Memory access schedule minimization for embedded systems. |
Journal of Systems Architecture - Embedded Systems Design |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Wei-Che Tseng, Chun Jason Xue, Qingfeng Zhuge, Jingtong Hu, Edwin Hsing-Mean Sha |
PRR: A low-overhead cache replacement algorithm for embedded processors. |
ASP-DAC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Lei Zhang, Meikang Qiu, Edwin Hsing-Mean Sha, Qingfeng Zhuge |
Variable assignment and instruction scheduling for processor with multi-module memory. |
Microprocessors and Microsystems - Embedded Hardware Design |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Jingtong Hu, Wei-Che Tseng, Chun Jason Xue, Qingfeng Zhuge, Yingchao Zhao, Edwin Hsing-Mean Sha |
Write Activity Minimization for Nonvolatile Main Memory Via Scheduling and Recomputation. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Meilin Liu, Edwin Hsing-Mean Sha, Qingfeng Zhuge, Yi He, Meikang Qiu |
Loop Distribution and Fusion with Timing and Code Size Optimization. |
Signal Processing Systems |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Yibo Guo, Qingfeng Zhuge, Jingtong Hu, Meikang Qiu, Edwin Hsing-Mean Sha |
Optimal Data Allocation for Scratch-Pad Memory on Embedded Multi-core Systems. |
ICPP |
2011 |
DBLP DOI BibTeX RDF |
Multi-core, Data Allocation, SPM |
| 1 | Jingtong Hu, Chun Jason Xue, Qingfeng Zhuge, Wei-Che Tseng, Edwin Hsing-Mean Sha |
Towards energy efficient hybrid on-chip Scratch Pad Memory with non-volatile memory. |
DATE |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Wei-Che Tseng, Jingtong Hu, Qingfeng Zhuge, Yi He, Edwin Hsing-Mean Sha |
Algorithms for Optimally Arranging Multicore Memory Structures. |
EURASIP J. Emb. Sys. |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Chun Jason Xue, Meilin Liu, Qingfeng Zhuge, Edwin Hsing-Mean Sha |
Variable Length Pattern Matching for Hardware Network Intrusion Detection System. |
Signal Processing Systems |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Wei-Che Tseng, Chun Jason Xue, Qingfeng Zhuge, Jingtong Hu, Edwin Hsing-Mean Sha |
Optimal scheduling to minimize non-volatile memory access time with hardware cache. |
VLSI-SoC |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Qingfeng Zhuge, Chun Jason Xue, Meikang Qiu, Jingtong Hu, Edwin Hsing-Mean Sha |
Timing optimization via nest-loop pipelining considering code size. |
Microprocessors and Microsystems - Embedded Hardware Design |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Bin Xiao, Jiannong Cao, Zili Shao, Qingfeng Zhuge, Edwin Hsing-Mean Sha |
Analysis and algorithms design for the partition of large-scale adaptive mobile wireless networks. |
Computer Communications |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Chun Xue, Zili Shao, Meilin Liu, Qingfeng Zhuge, Edwin Hsing-Mean Sha |
Parallel Network Intrusion Detection on Reconfigurable Platforms. |
EUC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Qingfeng Zhuge, Chun Xue, Zili Shao, Meilin Liu, Meikang Qiu, Edwin Hsing-Mean Sha |
Design optimization and space minimization considering timing and code size via retiming and unfolding. |
Microprocessors and Microsystems |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Zili Shao, Bin Xiao, Chun Xue, Qingfeng Zhuge, Edwin Hsing-Mean Sha |
Loop scheduling with timing and switching-activity minimization for VLIW DSP. |
ACM Trans. Design Autom. Electr. Syst. |
2006 |
DBLP DOI BibTeX RDF |
instruction bus optimization, low-power optimization, compilers, software pipelining, VLIW, retiming, instruction scheduling, loops |
| 1 | Zili Shao, Chun Xue, Qingfeng Zhuge, Mei Kang Qiu, Bin Xiao, Edwin Hsing-Mean Sha |
Security Protection and Checking for Embedded System Integration against Buffer Overflow Attacks via Hardware/Software. |
IEEE Trans. Computers |
2006 |
DBLP DOI BibTeX RDF |
hardware/software, Security, embedded system, protection, buffer overflow attack |
| 1 | Mei Kang Qiu, Chun Xue, Qingfeng Zhuge, Zili Shao, Meilin Liu, Edwin Hsing-Mean Sha |
Voltage Assignment and Loop Scheduling for Energy Minimization while Satisfying Timing Constraint with Guaranteed Probability. |
ASAP |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Mei Kang Qiu, Chun Xue, Zili Shao, Qingfeng Zhuge, Meilin Liu, Edwin Hsing-Mean Sha |
Efficent Algorithm of Energy Minimization for Heterogeneous Wireless Sensor Network. |
EUC |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Zili Shao, Qingfeng Zhuge, Chun Xue, Edwin Hsing-Mean Sha |
Efficient Assignment and Scheduling for Heterogeneous DSP Systems. |
IEEE Trans. Parallel Distrib. Syst. |
2005 |
DBLP DOI BibTeX RDF |
Network-level security and protection |
| 1 | Ying Chen, Zili Shao, Qingfeng Zhuge, Chun Xue, Bin Xiao, Edwin Hsing-Mean Sha |
Minimizing Energy via Loop Scheduling and DVS for Multi-Core Embedded Systems. |
ICPADS |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Zili Shao, Qingfeng Zhuge, Chun Xue, Bin Xiao, Edwin Hsing-Mean Sha |
High-level synthesis for DSP applications using heterogeneous functional units. |
ASP-DAC |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Meilin Liu, Qingfeng Zhuge, Zili Shao, Chun Xue, Meikang Qiu, Edwin Hsing-Mean Sha |
Maximum Loop Distribution and Fusion for Two-level Loops Considering Code Size. |
ISPAN |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Meilin Liu, Qingfeng Zhuge, Zili Shao, Chun Xue, Mei Kang Qiu, Edwin Hsing-Mean Sha |
Loop Distribution and Fusion with Timing and Code Size Optimization for Embedded DSPs. |
EUC |
2005 |
DBLP DOI BibTeX RDF |
Loop Distribution, Embedded DSP, Scheduling, Code Size, Loop Fusion |
| 1 | Mei Kang Qiu, Meilin Liu, Chun Xue, Qingfeng Zhuge, Edwin Hsing-Mean Sha, Zili Shao |
Optimal Assignment with Guaranteed Confidence Probability for Trees on Heterogeneous DSP Systems. |
IASTED PDCS |
2005 |
DBLP BibTeX RDF |
|
| 1 | Zili Shao, Chun Xue, Qingfeng Zhuge, Edwin Hsing-Mean Sha, Bin Xiao |
Efficient Array & Pointer Bound Checking Against Buffer Overflow Attacks via Hardware/Software. |
ITCC |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Bin Xiao, Qingfeng Zhuge, Edwin Hsing-Mean Sha |
Efficient Algorithms for Dynamic Update of Shortest Path Tree in Networking. |
I. J. Comput. Appl. |
2004 |
DBLP BibTeX RDF |
|
| 1 | Zili Shao, Qingfeng Zhuge, Youtao Zhang, Edwin Hsing-Mean Sha |
Algorithms and analysis of scheduling for low-power high-performance DSP on VLIW processors. |
IJHPCN |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Qingfeng Zhuge, Edwin Hsing-Mean Sha, Bin Xiao, Chantana Chantrapornchai |
Efficient variable partitioning and scheduling for DSP processors with multiple memory modules. |
IEEE Transactions on Signal Processing |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Meilin Liu, Qingfeng Zhuge, Zili Shao, Kevin F. Chen, Edwin Hsing-Mean Sha |
Loop Fusion via Retiming for DSP Applications. |
ISCA PDCS |
2004 |
DBLP BibTeX RDF |
|
| 1 | Zili Shao, Qingfeng Zhuge, Yi He, Chun Xue, Meilin Liu, Edwin Hsing-Mean Sha |
Assignment and Scheduling of Real-time DSP Applications for Heterogeneous Functional Units. |
IPDPS |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Qingfeng Zhuge, Zili Shao, Edwin Hsing-Mean Sha |
Timing Optimization of Nested Loops Considering Code Size for DSP Applications. |
ICPP |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Zili Shao, Qingfeng Zhuge, Meilin Liu, Bin Xiao, Edwin Hsing-Mean Sha |
Switching-Activity Minimization on Instruction-Level Loop Scheduling for VLIWDSP Applications. |
ASAP |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Meilin Liu, Qingfeng Zhuge, Zili Shao, Edwin Hsing-Mean Sha |
General loop fusion technique for nested loops considering timing and code size. |
CASES |
2004 |
DBLP DOI BibTeX RDF |
embedded DSP, scheduling, retiming, code size, loop fusion |
| 1 | Bin Xiao, Jiannong Cao, Qingfeng Zhuge, Zili Shao, Edwin Hsing-Mean Sha |
Dynamic Update of Shortest Path Tree in OSPF. |
ISPAN |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Bin Xiao, Jiannong Cao, Qingfeng Zhuge, Yi He, Edwin Hsing-Mean Sha |
Approximation Algorithms Design for Disk Partial Covering Problem. |
ISPAN |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Zili Shao, Qingfeng Zhuge, Meilin Liu, Edwin Hsing-Mean Sha, Bin Xiao |
Loop Scheduling for Real-Time DSPs with Minimum Switching Activities on Multiple-Functional-Unit Architectures. |
EUC |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Zili Shao, Chun Xue, Qingfeng Zhuge, Edwin Hsing-Mean Sha, Bin Xiao |
Security Protection and Checking in Embedded System Integration Against Buffer Overflow Attacks. |
ITCC |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha |
Code size reduction technique and implementation for software-pipelined DSP applications. |
ACM Trans. Embedded Comput. Syst. |
2003 |
DBLP DOI BibTeX RDF |
scheduling, software pipelining, Retiming, DSP processors |
| 1 | Bin Xiao, Qingfeng Zhuge, Zili Shao, Edwin Hsing-Mean Sha |
Design and Analysis of Improved Shortest Path Tree Update for Network Routing. |
ISCA PDCS |
2003 |
DBLP BibTeX RDF |
|
| 1 | Zili Shao, Qingfeng Zhuge, Yi He, Edwin Hsing-Mean Sha |
Defending Embedded Systems Against Buffer Overflow via Hardware/Software. |
ACSAC |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Qingfeng Zhuge, Edwin Hsing-Mean Sha, Chantana Chantrapornchai |
An Integrated Framework of Design Optimization and Space Minimization for DSP applications. |
ISCAS |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Zili Shao, Qingfeng Zhuge, Edwin Hsing-Mean Sha, Chantana Chantrapornchai |
Loop scheduling for minimizing schedule length and switching activities. |
ISCAS |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Qingfeng Zhuge, Zili Shao, Bin Xiao, Edwin Hsing-Mean Sha |
Design space minimization with timing and code size optimization for embedded DSP. |
CODES+ISSS |
2003 |
DBLP DOI BibTeX RDF |
retiming, unfolding, code size reduction, DSP processors |
| 1 | Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha |
Variable Partitioning and Scheduling of Multiple Memory Architectures for DSP. (PDF / PS) |
IPDPS |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Qingfeng Zhuge, Zili Shao, Edwin Hsing-Mean Sha |
Optimal Code Size Reduction for Software-Pipelined Loops on DSP Applications. (PDF / PS) |
ICPP |
2002 |
DBLP DOI BibTeX RDF |
Scheduling, Software pipelining, Retiming, DSP processors |
| 1 | Bin Xiao, Zili Shao, Chantana Chantrapornchai, Edwin Hsing-Mean Sha, Qingfeng Zhuge |
Optimal Code Size Reduction for Software-Pipelined and Unfolded Loops. |
ISSS |
2002 |
DBLP DOI BibTeX RDF |
rotation scheduling, software pipelining, retiming, unfolding |
| 1 | Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha |
Performance optimization of multiple memory architectures for DSP. |
ISCAS |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Bin Xiao, Qingfeng Zhuge, Edwin Hsing-Mean Sha, Chantana Chantrapornchai |
Analysis and Algorithms for Partitioning of Large-scale Adaptive Mobile Networks. |
IASTED PDCS |
2002 |
DBLP BibTeX RDF |
|
| 1 | Bin Xiao, Qingfeng Zhuge, Edwin Hsing-Mean Sha |
Efficient Update of Shortest Path Algorithms for Network Routing. |
ISCA PDCS |
2001 |
DBLP BibTeX RDF |
|
| 1 | Zhong Wang, Qingfeng Zhuge, Edwin Hsing-Mean Sha |
Scheduling and partitioning for multiple loop nests. |
ISSS |
2001 |
DBLP BibTeX RDF |
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