Search results for "Rafal Dlugosz"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Marta Kolasa, Rafal Dlugosz, Witold Pedrycz, Michal Szulc	A programmable triangular neighborhood function for a Kohonen self-organizing map implemented on chip.	Neural Networks	2012	DBLP DOI BibTeX RDF
1	Rafal Dlugosz, Pierre-André Farine, Kris Iniewski	Power efficient asynchronous multiplexer for X-ray sensors in medical imaging analog front-end electronics.	Microelectronics Journal	2011	DBLP DOI BibTeX RDF
1	Rafal Dlugosz, Marta Kolasa, Witold Pedrycz, Michal Szulc	Parallel Programmable Asynchronous Neighborhood Mechanism for Kohonen SOM Implemented in CMOS Technology.	IEEE Transactions on Neural Networks	2011	DBLP DOI BibTeX RDF
1	Rafal Dlugosz, Tomasz Talaska, Witold Pedrycz	Current-Mode Analog Adaptive Mechanism for Ultra-Low-Power Neural Networks.	IEEE Trans. on Circuits and Systems	2011	DBLP DOI BibTeX RDF
1	Rafal Dlugosz, Marta Kolasa, Witold Pedrycz	Fisherman learning algorithm of the SOM realized in the CMOS technology.	ESANN	2011	DBLP BibTeX RDF
1	Rafal Dlugosz, Tomasz Talaska	Low power current-mode binary-tree asynchronous Min/Max circuit.	Microelectronics Journal	2010	DBLP DOI BibTeX RDF
1	Rafal Dlugosz, Tomasz Talaska, Witold Pedrycz, Ryszard Wojtyna	Realization of the conscience mechanism in CMOS implementation of winner-takes-all self-organizing neural networks.	IEEE Transactions on Neural Networks	2010	DBLP DOI BibTeX RDF
1	Rafal Dlugosz, Witold Pedrycz	lukasiewicz fuzzy logic networks and their ultra low power hardware implementation.	Neurocomputing	2010	DBLP DOI BibTeX RDF
1	Rafal Dlugosz, Marta Kolasa, Witold Pedrycz	Programmable triangular neighborhood functions of Kohonen Self-Organizing Maps realized in CMOS technology.	ESANN	2010	DBLP BibTeX RDF
1	Rafal Dlugosz, Krzysztof Iniewski	Programmable Switched Capacitor Finite Impulse Response Filter with Circular Memory Implemented in CMOS 0.18 µm Technology.	Signal Processing Systems	2009	DBLP DOI BibTeX RDF	Baseband filtering, Switched capacitor technique (SC), Finite impulse response (FIR) filter, Programmable filter, GSM, WCDMA
1	Rafal Dlugosz, Witold Pedrycz	Lukasiewicz fuzzy logic networks and their ultra low power hardware implementation.	ESANN	2009	DBLP BibTeX RDF
1	Marta Kolasa, Rafal Dlugosz	Hardware Implementation Issues of the Neighborhood Mechanism in Kohonen Self Organized Feature Maps.	ESANN	2009	DBLP BibTeX RDF
1	Rafal Dlugosz, Vincent C. Gaudet	An Asynchronous Programmable Parallel 2-D Image Filter CMOS Ic Based on the Gilbert Vector Multiplier.	BIODEVICES	2009	DBLP BibTeX RDF
1	Rafal Dlugosz, Marta Kolasa	New Fast Training Algorithm Suitable for Hardware Kohonen Neural Networks Designed for Analysis of Biomedical Signals.	BIODEVICES	2009	DBLP BibTeX RDF
1	Marta Kolasa, Rafal Dlugosz	Parallel asynchronous neighborhood mechanism for WTM Kohonen network implemented in CMOS technology.	ESANN	2008	DBLP BibTeX RDF
1	Tomasz Talaska, Rafal Dlugosz	Initialization mechanism in Kohonen neural network implemented in CMOS technology.	ESANN	2008	DBLP BibTeX RDF
1	Rafal Dlugosz, Vincent C. Gaudet	Current-mode memory cell with power down phase for discrete time analog iterative decoders.	ISCAS	2008	DBLP DOI BibTeX RDF
1	Rafal Dlugosz, Kris Iniewski	Power and area efficient circular-memory switched-capacitor FIR baseband filter for WCDMA/GSM.	ISCAS	2008	DBLP DOI BibTeX RDF
1	Tomasz Talaska, Rafal Dlugosz, Witold Pedrycz	Adaptive Weight Change Mechanism for Kohonens's Neural Network Implemented in CMOS 0.18 um Technology.	ESANN	2007	DBLP BibTeX RDF
1	Rafal Tomasz Dlugosz, Krzysztof Iniewski	Flexible Architecture of Ultra-Low-Power Current-Mode Interleaved Successive Approximation Analog-to-Digital Converter for Wireless Sensor Networks.	VLSI Design	2007	DBLP DOI BibTeX RDF
1	A. Dabrowski, Rafal Dlugosz, P. Pawlowski	Integrated CMOS GSM baseband channel selecting filters realized using switched capacitor finite impulse response technique.	Microelectronics Reliability	2006	DBLP DOI BibTeX RDF
1	Keith Boyle, Sai Mohan Kilambi, Rafal Dlugosz, Kris Iniewski, Vincent C. Gaudet	An Examination of the Effect of Feature Size Scaling on Effective Power Consumption in Analog to Digital Converters.	SiPS	2006	DBLP DOI BibTeX RDF
1	Tomasz Talaska, Ryszard Wojtyna, Rafal Dlugosz, Krzysztof Iniewski, Witold Pedrycz	Analog-Counter-Based Conscience Mechanism in Kohonen's Neural Network Implemented in CMOS 0.18 m Technology.	SiPS	2006	DBLP DOI BibTeX RDF
1	Rafal Dlugosz, Krzysztof Iniewski, Tomasz Talaska	0.35 m 22W Multiphase Programmable Clock Generator for Circular Memory SC FIR Filter For Wireless Sensor Applications.	SiPS	2006	DBLP DOI BibTeX RDF
1	Krzysztof Iniewski, Valery Axelrad, Andrei Shibkov, Artur Balasinski, Sebastian Magierowski, Rafal Dlugosz, A. Dabrowski	3.125 Gb/s power efficient line driver with 2-level pre-emphasis and 2 kV HBM ESD protection.	ISCAS	2005	DBLP DOI BibTeX RDF

Publications of Rafal Dlugosz Rafal Tomasz Dlugosz ( http://dblp.L3S.de/Authors/Rafal_Dlugosz )