| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Oliver Knodel, Thomas B. Preußer, Rainer G. Spallek |
Next-generation massively parallel short-read mapping on FPGAs.  |
ASAP  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Marco Kaufmann, Matthias Häsing, Thomas Preußer, Rainer G. Spallek |
The Java Virtual Machine in retargetable, high-performance instruction set simulation.  |
PPPJ  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Thomas B. Preußer, Martin Zabel, Rainer G. Spallek |
Accelerating Computations on FPGA Carry Chains by Operand Compaction.  |
IEEE Symposium on Computer Arithmetic  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Thomas B. Preußer, Rainer G. Spallek |
Enhancing FPGA Device Capabilities by the Automatic Logic Mapping to Additive Carry Chains.  |
FPL  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Thomas B. Preußer, Peter Reichel, Rainer G. Spallek |
An Embedded GC Module with Support for Multiple Mutators and Weak References.  |
ARCS  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Michael Dittrich, Thomas B. Preußer, Rainer G. Spallek |
Solving Sudokus through an incidence matrix on an FPGA.  |
FPT  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Martin Zabel, Rainer G. Spallek |
Application requirements and efficiency of embedded Java bytecode multi-cores.  |
JTRES  |
2010 |
DBLP DOI BibTeX RDF |
multi-core, multi-threaded, realtime, Java bytecode |
| 1 | Thomas B. Preußer, Rainer G. Spallek |
Mapping basic prefix computations to fast carry-chain structures.  |
FPL  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Jens Braunes, Rainer G. Spallek |
Generating the trace qualification configuration for MCDS from a high level language.  |
DATE  |
2009 |
DBLP BibTeX RDF |
|
| 1 | Uwe Brinkschulte, Theo Ungerer, Christian Hochberger, Rainer G. Spallek (eds.) |
Architecture of Computing Systems - ARCS 2008, 21st International Conference, Dresden, Germany, February 25-28, 2008, Proceedings  |
ARCS  |
2008 |
DBLP BibTeX RDF |
|
| 1 | Thomas Preußer, Rainer G. Spallek |
Java-Programmed Bootloading in Spite of Load-Time Code Patching on a Minimal Embedded Bytecode Processor.  |
ESA  |
2008 |
DBLP BibTeX RDF |
|
| 1 | Steffen Köhler, Jan Schirok, Jens Braunes, Rainer G. Spallek |
Efficiency of Dynamic Reconfigurable Datapath Extensions -- A Case Study.  |
ARC  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Martin Zabel, Thomas B. Preußer, Peter Reichel, Rainer G. Spallek |
Secure, Real-Time and Multi-Threaded General-Purpose Embedded Java Microarchitecture.  |
DSD  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | J. Schneider, M. Naggatz, Rainer G. Spallek |
Implementation of Architecture Concepts for Hardware Agent Systems.  |
CIT  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Thomas Preußer, Martin Zabel, Rainer G. Spallek |
Bump-pointer method caching for embedded Java processors.  |
JTRES  |
2007 |
DBLP DOI BibTeX RDF |
method cache, Java |
| 1 | Thomas Preußer, Martin Zabel, Rainer G. Spallek |
Enabling constant-time interface method dispatch in embedded Java processors.  |
JTRES  |
2007 |
DBLP DOI BibTeX RDF |
Java, interfaces, method dispatch |
| 1 | Steffen Köhler, Martin Zimmerling, Martin Zabel, Rainer G. Spallek |
Prototyping and Application Development Framework for Dynamically Reconfigurable DSP Architectures.  |
ARCS Workshops  |
2006 |
DBLP BibTeX RDF |
|
| 1 | Thomas B. Preußer, Rainer G. Spallek |
Analysis of a Fully-Scalable Digital Fractional Clock Divider.  |
ASAP  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Jens Braunes, Rainer G. Spallek |
A Compiler-Oriented Architecture Description for Reconfigurable Systems.  |
ARC  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Jens Braunes, Steffen Köhler, Annett Königsmann, Rainer G. Spallek |
Ein Zwischenformat-Profiler für das RECAST-Framework.  |
ARCS Workshops  |
2005 |
DBLP BibTeX RDF |
|
| 1 | Steffen Köhler, Jens Braunes, Thomas Preußer, Martin Zabel, Rainer G. Spallek |
Increasing ILP of RISC Microprocessors Through Control-Flow Based Reconfiguration.  |
FPL  |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Jens Braunes, Steffen Köhler, Rainer G. Spallek |
RECAST: An Evaluation Framework for Coarse-Grain Reconfigurable Architectures.  |
ARCS  |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Thomas Preußer, Steffen Köhler, Rainer G. Spallek |
RECAST - Design Space Exploration for Dynamic Reconfigurable Embedded Computing.  |
ESA/VLSI  |
2004 |
DBLP BibTeX RDF |
|
| 1 | Sergej Sawitzki, Rainer G. Spallek |
Architecture Template and Design Flow to Support Applications Parallelism on Reconfigurable Platforms.  |
FPL  |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Sebastian Friebe, Steffen Köhler, Rainer G. Spallek, Henrik Juhr, Klaus Künanz |
A Reconfigurable System-on-Chip-Based Fast EDM Process Monitor.  |
FPL  |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Steffen Köhler, Jens Braunes, Sergej Sawitzki, Rainer G. Spallek |
Improving Code Efficiency for Reconfigurable VLIW Processors. (PDF / PS)  |
IPDPS  |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Sergej Sawitzki, Steffen Köhler, Rainer G. Spallek |
Prototyping Framework for Reconfigurable Processors.  |
FPL  |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Sergej Sawitzki, Jens Schönherr, Rainer G. Spallek, Bernd Straube |
Formal Verification of a Reconfigurable Microprocessor.  |
FPL  |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Sergej Sawitzki, Rainer G. Spallek, Jens Schönherr, Bernd Straube |
Formal Verification for Microprocessors with Extendable Instruction Set.  |
ASAP  |
2000 |
DBLP DOI BibTeX RDF |
reconfigurable processor architecture, abstraction techniques, formal verification, pipeline processor |
| 1 | Sergej Sawitzki, Rainer G. Spallek |
A Concept for an Evaluation Framework for Reconfigurable Systems.  |
FPL  |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Steffen Köhler, Sergej Sawitzki, Achim Gratz, Rainer G. Spallek |
Digital Signal Processing with General Purpose Microprocessors, DSP and Rcinfigurable Logic.  |
IPPS/SPDP Workshops  |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Sergej Sawitzki, Achim Gratz, Rainer G. Spallek |
Increasing Microprocessor Performance with Tightly-Coupled Reconfigurable Logic Arrays.  |
FPL  |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Raimar Falke, Michael Peter, Achim Gratz, Rainer G. Spallek |
Common Logging Interface - Ein System zum Sammeln und Verarbeiten von Debugnachrichten in verteilten Umgebungen.  |
Java-Informations-Tage  |
1998 |
DBLP BibTeX RDF |
|
| 1 | Gert Markwardt, Günter Kemnitz, Rainer G. Spallek |
A RISC Processor with Extended Forwarding.  |
ARCS  |
1997 |
DBLP BibTeX RDF |
|
| 1 | Achim Gratz, Rainer G. Spallek |
Bewertung von modernen Rechnerarchitekturen hinsichtlich numerischer Simulationen auf heterogenen Plattformen.  |
MMB (Kurzbeiträge)  |
1997 |
DBLP BibTeX RDF |
|