| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Miodrag Potkonjak, Ramesh Karri, Ingrid Verbauwhede, Kouichi Itoh |
Guest Editorial Integrated Circuit and System Security.  |
IEEE Transactions on Information Forensics and Security  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Arun K. Kanuparthi, Mohamed Zahran, Ramesh Karri |
Architecture Support for Dynamic Integrity Checking. |
IEEE Transactions on Information Forensics and Security |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Jeyavijayan Rajendran, Harika Manem, Ramesh Karri, Garrett S. Rose |
An Energy-Efficient Memristive Threshold Logic Circuit. |
IEEE Trans. Computers |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Garrett S. Rose, Jeyavijayan Rajendran, Harika Manem, Ramesh Karri, Robinson E. Pino |
Leveraging Memristive Systems in the Construction of Digital Logic Circuits. |
Proceedings of the IEEE |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Jeyavijayan Rajendran, Youngok Pino, Ozgur Sinanoglu, Ramesh Karri |
Logic encryption: A fault analysis perspective. |
DATE |
2012 |
DBLP BibTeX RDF |
|
| 1 | Yu Liu, Kaijie Wu, Ramesh Karri |
Scan-based attacks on linear feedback shift register based stream ciphers. |
ACM Trans. Design Autom. Electr. Syst. |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohammad Tehranipoor, Hassan Salmani, Xuehui Zhang, Michel Wang, Ramesh Karri, Jeyavijayan Rajendran, Kurt Rosenfeld |
Trustworthy Hardware: Trojan Detection and Design-for-Trust Challenges. |
IEEE Computer |
2011 |
DBLP DOI BibTeX RDF |
Hardware Trojans, Side-channel signal analysis, Integrated circuits, Intellectual property |
| 1 | Wenjing Rao, Chengmo Yang, Ramesh Karri, Alex Orailoglu |
Toward Future Systems with Nanoscale Devices: Overcoming the Reliability Challenge. |
IEEE Computer |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Jeyavijayan Rajendran, Vinayaka Jyothi, Ozgur Sinanoglu, Ramesh Karri |
Design and analysis of ring oscillator based Design-for-Trust technique. |
VTS |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Kurt Rosenfeld, Ramesh Karri |
Security-aware SoC test access mechanisms. |
VTS |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Jeyavijayan Rajendran, Harika Manem, Ramesh Karri, Garrett S. Rose |
An Approach to Tolerate Process Related Variations in Memristor-Based Applications. |
VLSI Design |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Jeyavijayan Rajendran, Ramesh Karri, Garrett S. Rose |
Parallel memristors: Improving variation tolerance in memristive digital circuits. |
ISCAS |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Jeyavijayan Rajendran, Vinayaka Jyothi, Ramesh Karri |
Blue team red team approach to hardware trust assessment. |
ICCD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Artem Durytskyy, Mohamed Zahran, Ramesh Karri |
Improving GPU Robustness by making use of faulty parts. |
ICCD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Ramesh Karri, Jeyavijayan Rajendran, Kurt Rosenfeld, Mohammad Tehranipoor |
Trustworthy Hardware: Identifying and Classifying Hardware Trojans. |
IEEE Computer |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Kurt Rosenfeld, Ramesh Karri |
Attacks and Defenses for JTAG. |
IEEE Design & Test of Computers |
2010 |
DBLP DOI BibTeX RDF |
security, design and test, hardware security, embedded test, JTAG |
| 1 | Jeyavijayan Rajendran, Hetal Borad, Shyam Mantravadi, Ramesh Karri |
SLICED: Slide-based Concurrent Error Detection Technique for Symmetric Block Ciphers. |
HOST |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Kurt Rosenfeld, Efstratios Gavas, Ramesh Karri |
Sensor Physical Unclonable Functions. |
HOST |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Jeyavijayan Rajendran, Efstratios Gavas, Jorge Jimenez, Vikram Padman, Ramesh Karri |
Towards a comprehensive and systematic classification of hardware Trojans. |
ISCAS |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Jianzhou Li, Ramesh Karri |
Compact hardware architectures for BLAKE and LAKE hash functions. |
ISCAS |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Arun K. Kanuparthi, Mohamed Zahran, Ramesh Karri |
Feasibility study of dynamic Trusted Platform Module. |
ICCD |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Yu Liu, Kaijie Wu, Ramesh Karri |
Scan-based Attacks on Linear Feedback Shift Register Based Stream Ciphers. |
IACR Cryptology ePrint Archive |
2009 |
DBLP BibTeX RDF |
|
| 1 | Wenjing Rao, Alex Orailoglu, Ramesh Karri |
Logic Mapping in Crossbar-Based Nanoarchitectures. |
IEEE Design & Test of Computers |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Bo Yang, Ramesh Karri |
Power Optimization for Universal Hash Function Data Path Using Divide-and-Concatenate Technique. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Kyosun Kim, Kaijie Wu, Ramesh Karri |
The Robust QCA Adder Designs Using Composable QCA Building Blocks. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Wenjing Rao, Alex Orailoglu, Ramesh Karri |
Towards Nanoelectronics Processor Architectures. |
J. Electronic Testing |
2007 |
DBLP DOI BibTeX RDF |
fault tolerance, reliability, computational model, processor architecture, nanoelectronics, time redundancy, hardware redundancy |
| 1 | Wenjing Rao, Alex Orailoglu, Ramesh Karri |
Fault Tolerant Approaches to Nanoelectronic Programmable Logic Arrays. |
DSN |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Wenjing Rao, Alex Orailoglu, Ramesh Karri |
Interactive presentation: Logic level fault tolerance approaches targeting nanoelectronics PLAs. |
DATE |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Richard Stern, Nikhil Joshi, Kaijie Wu, Ramesh Karri |
Register Transfer Level Concurrent Error Detection in Elliptic Curve Crypto Implementations. |
FDTC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Kyosun Kim, Kaijie Wu, Ramesh Karri |
Quantum-Dot Cellular Automata Design Guideline. |
IEICE Transactions |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Nikhil Joshi, Jayachandran Sundararajan, Kaijie Wu, Bo Yang, Ramesh Karri |
Tamper Proofing by Design Using Generalized Involution-Based Concurrent Error Detection for Involutional Substitution Permutation and Feistel Networks. |
IEEE Trans. Computers |
2006 |
DBLP DOI BibTeX RDF |
Subsitution Permutation Networks (SPN), ANUBIS, TwoFish, cryptography, Concurrent Error Detection (CED), tamper proofing, Feistel networks |
| 1 | Kyosun Kim, Ramesh Karri, Miodrag Potkonjak |
Micropreemption synthesis: an enabling mechanism for multitask VLSI systems. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Kaijie Wu, Ramesh Karri |
Algorithm-level recomputing with shifted operands-a register transfer level concurrent error detection technique. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Nikhil Joshi, Kaijie Wu, Jayachandran Sundararajan, Ramesh Karri |
Concurrent error detection for involutional functions with applications in fault-tolerant cryptographic hardware design. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Bo Yang, Kaijie Wu, Ramesh Karri |
Secure Scan: A Design-for-Test Architecture for Crypto Chips. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Bo Yang, Ramesh Karri, David A. McGrew |
A High-Speed Hardware Architecture for Universal Message Authentication Code. |
IEEE Journal on Selected Areas in Communications |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Wenjing Rao, Alex Orailoglu, Ramesh Karri |
Topology aware mapping of logic functions onto nanowire-based crossbar architectures. |
DAC |
2006 |
DBLP DOI BibTeX RDF |
logic synthesis, PLA, nanoelectronic, crossbar |
| 1 | Wenjing Rao, Alex Orailoglu, Ramesh Karri |
Fault Identification in Reconfigurable Carry Lookahead Adders Targeting Nanoelectronic Fabrics. |
European Test Symposium |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Wenjing Rao, Alex Orailoglu, Ramesh Karri |
Nanofabric Topologies and Reconfiguration Algorithms to Support Dynamically Adaptive Fault Tolerance. |
VTS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Bo Yang, Sambit Mishra, Ramesh Karri |
A High Speed Architecture for Galois/Counter Mode of Operation (GCM). |
IACR Cryptology ePrint Archive |
2005 |
DBLP BibTeX RDF |
|
| 1 | Bo Yang, Ramesh Karri, David A. McGrew |
Divide-and-concatenate: an architecture-level optimization technique for universal hash functions. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Bo Yang, Kaijie Wu, Ramesh Karri |
Secure scan: a design-for-test architecture for crypto chips. |
DAC |
2005 |
DBLP DOI BibTeX RDF |
crypto hardware, scan-based DFT, security, testability |
| 1 | Wenjing Rao, Alex Orailoglu, Ramesh Karri |
Fault tolerant nanoelectronic processor architectures. |
ASP-DAC |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Tongquan Wei, Kaijie Wu, Ramesh Karri, Alex Orailoglu |
Fault tolerant quantum cellular array (QCA) design using Triple Modular Redundancy with shifted operands. |
ASP-DAC |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Bo Yang, Nikhil Joshi, Ramesh Karri |
A constant array multiplier core generator with dynamic partial evaluation architecture selection (abstract only). |
FPGA |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Kyosun Kim, Kaijie Wu, Ramesh Karri |
owards Designing Robust QCA Architectures in the Presence of Sneak Noise Paths. |
DATE |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Vitalij Ocheretnij, G. Kouznetsov, Ramesh Karri, Michael Gössel |
On-Line Error Detection and BIST for the AES Encryption Algorithm with Different S-Box Implementations. |
IOLTS |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Wenjing Rao, Alex Orailoglu, Ramesh Karri |
Architectural-Level Fault Tolerant Computation in Nanoelectronic Processors. |
ICCD |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Bo Yang, Ramesh Karri |
Power optimization for universal hash function data path using divide-and-concatenate technique. |
CODES+ISSS |
2005 |
DBLP DOI BibTeX RDF |
divide-and-concatenate, power optimization, universal hash function |
| 1 | Darshan Sonecha, Bo Yang, Ramesh Karri, David A. McGrew |
High speed architectures for Leviathan: a binary tree based stream cipher. |
Microprocessors and Microsystems |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Inki Hong, Miodrag Potkonjak, Ramesh Karri |
A heterogeneous built-in self-repair approach using system-level synthesis flexibility. |
IEEE Transactions on Reliability |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Bo Yang, Kaijie Wu, Ramesh Karri |
Scan Based Side Channel Attack on Data Encryption Standard. |
IACR Cryptology ePrint Archive |
2004 |
DBLP BibTeX RDF |
|
| 1 | Kaijie Wu, Ramesh Karri |
Fault secure datapath synthesis using hybrid time and hardware redundancy. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Kaijie Wu, Ramesh Karri, Grigori Kuznetsov, Michael Gössel |
Low Cost Concurrent Error Detection for the Advanced Encryption Standard. |
ITC |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Wenjing Rao, Alex Orailoglu, Ramesh Karri |
Fault Tolerant Arithmetic with Applications in Nanotechnology based Systems. |
ITC |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Bo Yang, Kaijie Wu, Ramesh Karri |
Scan Based Side Channel Attack on Dedicated Hardware Implementations of Data Encryption Standard. |
ITC |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Bo Yang, Ramesh Karri, David A. McGrew |
Divide-and-concatenate: an architecture level optimization technique for universal hash functions. |
DAC |
2004 |
DBLP DOI BibTeX RDF |
Performance, Design, Experimentation |
| 1 | Bo Yang, Ramesh Karri, David A. McGrew |
Divide and concatenate: a scalable hardware architecture for universal MAC. |
FPGA |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Nikhil Joshi, Kaijie Wu, Ramesh Karri |
Concurrent Error Detection Schemes for Involution Ciphers. |
CHES |
2004 |
DBLP DOI BibTeX RDF |
Involutional ciphers, KHAZAD, Fault Tolerance, Concurrent Error Detection (CED) |
| 1 | Ramesh Karri, Piyush Mishra |
Optimizing the Energy Consumed by Secure Wireless Sessions - Wireless Transport Layer Security Case Study. |
MONET |
2003 |
DBLP BibTeX RDF |
|
| 1 | Kaijie Wu, Ramesh Karri |
Selectively breaking data dependences to improve the utilization of idle cycles in algorithm level re-computing data paths. |
IEEE Transactions on Reliability |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Kaijie Wu, Piyush Mishra, Ramesh Karri |
Concurrent error detection of fault-based side-channel cryptanalysis of 128-bit RC6 block cipher. |
Microelectronics Journal |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Bo Yang, Ramesh Karri, David A. McGrew |
Divide and Concatenate: A Scalable Hardware Architecture for Universal MAC. |
IACR Cryptology ePrint Archive |
2003 |
DBLP BibTeX RDF |
|
| 1 | Ramesh Karri, Grigori Kuznetsov, Michael Gössel |
Parity-Based Concurrent Error Detection in Symmetric Block Ciphers. |
ITC |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Kaijie Wu, Ramesh Karri |
Register Transfer Level Approach to Hybrid Time and Hardware Redundancy Based Fault Secure Datapath Synthesis. |
ITC |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Ramesh Karri, Piyush Mishra |
Analysis of Energy Consumed by Secure Session Negotiation Protocols in Wireless Networks. |
PATMOS |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Ramesh Karri, Grigori Kuznetsov, Michael Gössel |
Parity-Based Concurrent Error Detection of Substitution-Permutation Network Block Ciphers. |
CHES |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Kaijie Wu, Ramesh Karri |
Algorithm level recomputing using allocation diversity: a registertransfer level approach to time redundancy-based concurrent errordetection. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Ramesh Karri, Kaijie Wu, Piyush Mishra, Yongkook Kim |
Concurrent error detection schemes for fault-based side-channel cryptanalysis of symmetric block ciphers. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Ramesh Karri, Balakrishnan Iyer, Israel Koren |
Phantom redundancy: a register transfer level technique for gracefully degradable data path synthesis. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Ramesh Karri, Kaijie Wu |
Algorithm level re-computing using implementation diversity: a register transfer level concurrent error detection technique. |
IEEE Trans. VLSI Syst. |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Kaijie Wu, Ramesh Karri |
Exploiting Idle Cycles for Algorithm Level Re-Computing. |
DATE |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Ramesh Karri, Balakrishnan Iyer |
Introspection: A register transfer level technique for cocurrent error detection and diagnosis in data dominated designs. |
ACM Trans. Design Autom. Electr. Syst. |
2001 |
DBLP DOI BibTeX RDF |
Concurrent error detection, register transfer level, on line testing |
| 1 | Ramesh Karri |
Guest editor's introduction to special section on high-level design validation and test. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Kaijie Wu, Ramesh Karri |
Algorithm level recomputing with allocation diversity: a register transfer level time redundancy based concurrent error detection technique. |
ITC |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Ramesh Karri, Kaijie Wu, Piyush Mishra, Yongkook Kim |
Concurrent Error Detection of Fault-Based Side-Channel Cryptanalysis of 128-Bit Symmetric Block Ciphers. |
DAC |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Kaijie Wu, Ramesh Karri |
Idle Cycles Based Concurrent Error Detection of RC6 Encryption. (PDF / PS) |
DFT |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Ramesh Karri, Kaijie Wu, Piyush Mishra, Yongkook Kim |
Fault-Based Side-Channel Cryptanalysis Tolerant Rijndael Symmetric Block Cipher Architecture. (PDF / PS) |
DFT |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Kaijie Wu, Ramesh Karri |
Algorithm Level Re-Computing - A Register Transfer Level Concurrent Error Detection Technique. |
ICCAD |
2001 |
DBLP BibTeX RDF |
|
| 1 | Ramesh Karri, Kyosun Kim, Miodrag Potkonjak |
Computer Aided Design of Fault-Tolerant Application Specific Programmable Processors. |
IEEE Trans. Computers |
2000 |
DBLP DOI BibTeX RDF |
Application specific programmable processors, fault tolerance, graceful degradation, behavioral synthesis |
| 1 | Ramesh Karri, Kaijie Wu |
Algorithm level re-computing with shifted operands-a register transfer level concurrent error detection technique. |
ITC |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Inki Hong, Miodrag Potkonjak, Ramesh Karri |
Power optimization using divide-and-conquer techniques for minimization of the number of operations. |
ACM Trans. Design Autom. Electr. Syst. |
1999 |
DBLP DOI BibTeX RDF |
code generation, transformations |
| 1 | Aurobindo Dasgupta, Ramesh Karri |
High-reliability, low-energy microarchitecture synthesis. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Nilanjan Mukherjee, Ramesh Karri |
Versatile BIST: An Integrated Approach to On-line/Off-line BIST for Data-Dominated Architectures. |
J. Electronic Testing |
1998 |
DBLP DOI BibTeX RDF |
data-path architectures, response compactor, concurrency, built-in self test, high-level synthesis, on-line test, pattern generator, test function |
| 1 | Ramesh Karri, Michael Nicolaidis |
Guest Editors' Introduction: Online VLSI Testing. |
IEEE Design & Test of Computers |
1998 |
DBLP BibTeX RDF |
|
| 1 | Ramesh Karri, Nilanjan Mukherjee |
Versatile BIST: an integrated approach to on-line/off-line BIST. |
ITC |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Inki Hong, Miodrag Potkonjak, Ramesh Karri |
Heterogeneous BISR-approach using System Level Synthesis Flexibility. |
ASP-DAC |
1998 |
DBLP BibTeX RDF |
|
| 1 | Charles E. Stroud, M. Ding, S. Seshadri, Ramesh Karri, I. Kim, S. Roy, S. Wu |
A Parameterized VHDL Library for On-Line Testing. |
ITC |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Kyosun Kim, Ramesh Karri, Miodrag Potkonjak |
Synthesis of Application Specific Programmable Processors. |
DAC |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Miodrag Potkonjak, Kyosun Kim, Ramesh Karri |
Methodology for Behavioral Synthesis-Based Algorithm-Level Design Space Exploration: DCT Case Study. |
DAC |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Kyosun Kim, Ramesh Karri, Miodrag Potkonjak |
Micro-preemption synthesis: an enabling mechanism for multi-task VLSI systems. |
ICCAD |
1997 |
DBLP DOI BibTeX RDF |
micro-preemption, multi-task VLSI system synthesis, context switch overhead, preemption latency |
| 1 | Inki Hong, Miodrag Potkonjak, Ramesh Karri |
Power optimization using divide-and-conquer techniques for minimization of the number of operations. |
ICCAD |
1997 |
DBLP DOI BibTeX RDF |
DSP computations, architectural techniques, divide-and-conquer compilation, portable wireless DSP applications, compilation, power consumption, data flow graphs |
| 1 | Alex Orailoglu, Ramesh Karri |
Automatic Synthesis of Self-Recovering VLSI Systems. |
IEEE Trans. Computers |
1996 |
DBLP DOI BibTeX RDF |
VLSI design automation, Fault tolerance, high level synthesis, transient faults, self-recovery |
| 1 | Ramesh Karri, Karin Högstedt, Alex Orailoglu |
Computer-Aided Design of Fault-Tolerant VLSI Systems. |
IEEE Design & Test of Computers |
1996 |
DBLP DOI BibTeX RDF |
Fault-Tolerance, CAD, High Level Synthesis |
| 1 | Balakrishnan Iyer, Ramesh Karri |
Introspection: A Low Overhead Binding Technique During Self-Diagnosing Microarchitecture Synthesis. |
DAC |
1996 |
DBLP DOI BibTeX RDF |
|
| 1 | Aurobindo Dasgupta, Ramesh Karri |
Hot-Carrier Reliability Enhancement via Input Reordering and Transistor Sizing. |
DAC |
1996 |
DBLP DOI BibTeX RDF |
|
| 1 | Aurobindo Dasgupta, Ramesh Karri |
Electromigration Reliability Enhancement via Bus Activity Distribution. |
DAC |
1996 |
DBLP DOI BibTeX RDF |
|
| 1 | Kyosun Kim, Ramesh Karri, Miodrag Potkonjak |
Heterogeneous built-in resiliency of application specific programmable processors. |
ICCAD |
1996 |
DBLP DOI BibTeX RDF |
HBIR, ASPP, fault tolerance, synthesis |
| 1 | Aurobindo Dasgupta, Ramesh Karri |
Simultaneous scheduling and binding for power minimization during microarchitecture synthesis. |
ISLPD |
1995 |
DBLP DOI BibTeX RDF |
|
| 1 | Aurobindo Dasgupta, Ramesh Karri |
Synthesis of Reliable Application Specific Heterogeneous Multiprocessors. |
ISCAS |
1995 |
DBLP BibTeX RDF |
|
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