Search results for "Reza Sedaghat"

Hits ?▲	Authors	Title	Venue	Year	Link
1	Anirban Sengupta, Reza Sedaghat, Pallabi Sarkar	Rapid exploration of integrated scheduling and module selection in high level synthesis for application specific processor design.	Microprocessors and Microsystems - Embedded Hardware Design	2012	DBLP DOI BibTeX RDF
1	Anirban Sengupta, Reza Sedaghat, Zhipeng Zeng	Multi-objective efficient design space exploration and architectural synthesis of an application specific processor (ASP).	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Anirban Sengupta, Reza Sedaghat, Zhipeng Zeng	Rapid design space exploration by hybrid fuzzy search approach for optimal architecture determination of multi objective computing systems.	Microelectronics Reliability	2011	DBLP DOI BibTeX RDF
1	Reza Sedaghat, M. Reza Javaheri, Prabhleen K. Kalkat, Jalal Mohammad Chikhe	Switch-level emulation of strength-base soft error detection.	Microelectronics Reliability	2011	DBLP DOI BibTeX RDF
1	Anirban Sengupta, Reza Sedaghat	Integrated scheduling, allocation and binding in High Level Synthesis using multi structure genetic algorithm based design space exploration.	ISQED	2011	DBLP DOI BibTeX RDF
1	Anirban Sengupta, Reza Sedaghat, Pallabi Sarkar, Summit Sehgal	Integrated scheduling, allocation and binding in High Level Synthesis for performance-area tradeoff of digital media applications.	CCECE	2011	DBLP DOI BibTeX RDF
1	Anirban Sengupta, Reza Sedaghat, Pallabi Sarkar, Summit Sehgal	Priority function based power efficient rapid Design Space Exploration of scheduling and module selection in high level synthesis.	CCECE	2011	DBLP DOI BibTeX RDF
1	Reza Sedaghat, M. Reza Javaheri, Prabhleen K. Kalkat, Jalal Mohammad Chikhe	Switch-level soft error emulation for SET-induced pulses of variable strengths.	Microelectronics Journal	2010	DBLP DOI BibTeX RDF
1	M. Reza Javaheri, Reza Sedaghat	Strength violation effect on soft-error detection in sub-micron technology.	Microelectronics Reliability	2010	DBLP DOI BibTeX RDF
1	Anirban Sengupta, Reza Sedaghat, Zhipeng Zeng	A high level synthesis design flow with a novel approach for efficient design space exploration in case of multi-parametric optimization objective.	Microelectronics Reliability	2010	DBLP DOI BibTeX RDF
1	Zhipeng Zeng, Reza Sedaghat, Anirban Sengupta	A framework for fast design space exploration using fuzzy search for VLSI computing Architectures.	ISCAS	2010	DBLP DOI BibTeX RDF
1	Anirban Sengupta, Reza Sedaghat, Zhipeng Zeng	Rapid design space exploration for multi parametric optimization of VLSI designs.	ISCAS	2010	DBLP DOI BibTeX RDF
1	M. Reza Javaheri, Reza Sedaghat	Multi-valued logic mapping of resistive short and open delay-fault testing in deep sub-micron technologies.	Microelectronics Reliability	2009	DBLP DOI BibTeX RDF
1	Peter Ming-Han Lee, Reza Sedaghat	FPGA-based switch-level fault emulation using module-based dynamic partial reconfiguration.	Microelectronics Reliability	2008	DBLP DOI BibTeX RDF
1	Mayuri Kunchwar, Reza Sedaghat, Vadim Geurkov	Dynamic behavior of resistive faults in nanometer technology.	Microelectronics Reliability	2007	DBLP DOI BibTeX RDF
1	Hyunsuk Moon, Reza Sedaghat	FPGA-Based adaptive digital predistortion for radio-over-fiber links.	Microprocessors and Microsystems	2006	DBLP DOI BibTeX RDF
1	M. Reza Javaheri, Reza Sedaghat, Leo Kant, Jason Zalev	Verification and fault synthesis algorithm at switch-level.	Microprocessors and Microsystems	2006	DBLP DOI BibTeX RDF
1	Reza Sedaghat, Mayuri Kunchwar, Raha Abedi, M. Reza Javaheri	Transistor-level to gate-level comprehensive fault synthesis for n-input primitive gates.	Microelectronics Reliability	2006	DBLP DOI BibTeX RDF
1	Reza Sedaghat	A fast algorithm to reduce 2-dimensional assignment problems to 1-dimensional assignment problems for FPGA-based fault simulation.	ISCAS	2003	DBLP DOI BibTeX RDF

Publications of "Reza Sedaghat" ( http://dblp.L3S.de/Authors/Reza_Sedaghat )