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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 23 occurrences of 21 keywords
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Results
Found 17 publication records. Showing 17 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Zheng Li, Moustafa Mohamed, Xi Chen, Eric Dudley, Ke Meng, Li Shang, Alan Rolf Mickelson, Russ Joseph, Manish Vachharajani, Brian Schwartz, Yihe Sun |
Reliability Modeling and Management of Nanophotonic On-Chip Networks.  |
IEEE Trans. VLSI Syst.  |
2012 |
DBLP DOI BibTeX RDF |
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| 1 | Giang Hoang, Robby Bruce Findler, Russ Joseph |
Exploring circuit timing-aware language and compilation. |
ASPLOS |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Jing Xin, Russ Joseph |
Identifying and predicting timing-critical instructions to boost timing speculation. |
MICRO |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Giang Hoang, Chang Bae, Jack Lange, Lide Zhang, Peter A. Dinda, Russ Joseph |
A Case for Alternative Nested Paging Models for Virtualized Systems. |
Computer Architecture Letters |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Jing Xin, Russ Joseph |
Exploiting Locality to Improve Circuit-Level Timing Speculation. |
Computer Architecture Letters |
2009 |
DBLP DOI BibTeX RDF |
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| 1 | Lide Zhang, Lan S. Bai, Robert P. Dick, Li Shang, Russ Joseph |
Process variation characterization of chip-level multiprocessors. |
DAC |
2009 |
DBLP DOI BibTeX RDF |
software, process variation, characterization |
| 1 | Changyun Zhu, Zhenyu (Peter) Gu, Li Shang, Robert P. Dick, Russ Joseph |
Three-Dimensional Chip-Multiprocessor Run-Time Thermal Management. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Ke Meng, Russ Joseph, Robert P. Dick, Li Shang |
Multi-optimization power management for chip multiprocessors. |
PACT |
2008 |
DBLP DOI BibTeX RDF |
cache resizing, voltage/frequency scaling, dynamic power management, chip multi-processor |
| 1 | David Brooks, Robert P. Dick, Russ Joseph, Li Shang |
Power, Thermal, and Reliability Modeling in Nanometer-Scale Microprocessors. |
IEEE Micro |
2007 |
DBLP DOI BibTeX RDF |
process variation, power models, reliability models, modeling of computer architecture, thermal analysis |
| 1 | Ke Meng, Frank Huebbers, Russ Joseph, Yehea I. Ismail |
Modeling and Characterizing Power Variability in Multicore Architectures. |
ISPASS |
2007 |
DBLP DOI BibTeX RDF |
mal-fabricated chip, VariPower, project power variability, microarchitectural block, power variability characterization, statistical analysis, multicore processor, multicore architecture, technology scaling, parameter variation, SPICE simulation |
| 1 | Meeta Sharma Gupta, Jarod L. Oatley, Russ Joseph, Gu-Yeon Wei, David M. Brooks |
Understanding voltage variations in chip multiprocessors using a distributed power-delivery network. |
DATE |
2007 |
DBLP DOI BibTeX RDF |
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| 1 | Seunghoon Kim, Robert P. Dick, Russ Joseph |
Power deregulation: eliminating off-chip voltage regulation circuitry from embedded systems. |
CODES+ISSS |
2007 |
DBLP DOI BibTeX RDF |
power regulation, multimedia, chip multiprocessor, battery |
| 1 | Ke Meng, Russ Joseph |
Process variation aware cache leakage management. |
ISLPED |
2006 |
DBLP DOI BibTeX RDF |
gated-VDD, selective cache ways, low power, process variation, leakage, cache management |
| 1 | Russ Joseph, Margaret Martonosi, Zhigang Hu |
Spectral analysis for characterizing program power and performance. |
ISPASS |
2004 |
DBLP DOI BibTeX RDF |
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| 1 | Russ Joseph, Zhigang Hu, Margaret Martonosi |
Wavelet Analysis for Microprocessor Design: Experiences with Wavelet-Based dI/dt Characterization. |
HPCA |
2004 |
DBLP DOI BibTeX RDF |
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| 1 | Russ Joseph, David Brooks, Margaret Martonosi |
Control Techniques to Eliminate Voltage Emergencies in High Performance Processors. |
HPCA |
2003 |
DBLP DOI BibTeX RDF |
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| 1 | Russ Joseph, Margaret Martonosi |
Run-time power estimation in high performance microprocessors. |
ISLPED |
2001 |
DBLP DOI BibTeX RDF |
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Displaying result #1 - #17 of 17 (100 per page; Change: )
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