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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 7 occurrences of 7 keywords
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Results
Found 9 publication records. Showing 9 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Parikshit Yadav, Rajesh Kumar, S. K. Panda, C. S. Chang |
An Intelligent Tuned Harmony Search algorithm for optimisation.  |
Inf. Sci.  |
2012 |
DBLP DOI BibTeX RDF |
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| 1 | Rajdeep Mukhopadhyay, Anvesh Komuravelli, Pallab Dasgupta, S. K. Panda, Siddhartha Mukhopadhyay |
A static verification approach for architectural integration of mixed-signal integrated circuits.  |
Integration  |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Rajdeep Mukhopadhyay, S. K. Panda, Pallab Dasgupta, John Gough |
Instrumenting AMS assertion verification on commercial platforms.  |
ACM Trans. Design Autom. Electr. Syst.  |
2009 |
DBLP DOI BibTeX RDF |
OVL, SVA, integrated mixed signal design, verification library, simulation, Assertion |
| 1 | Subhankar Mukherjee, Antara Ain, S. K. Panda, Rajdeep Mukhopadhyay, Pallab Dasgupta |
A formal approach for specification-driven AMS behavioral model generation.  |
DATE  |
2009 |
DBLP BibTeX RDF |
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| 1 | S. K. Panda, Arnab Roy 0001, P. P. Chakrabarti, Rajeev Kumar |
Simulation-based verification using Temporally Attributed Boolean Logic.  |
ACM Trans. Design Autom. Electr. Syst.  |
2008 |
DBLP DOI BibTeX RDF |
Bus verification, instruction semantics verification, interrupt testing, offline-online verification algorithm, simulation based verification, temporal logic, timing verification |
| 1 | J.-X. Xu, B. Ashok, S. K. Panda, V. Bajic |
Modeling transcription termination of selected gene groups using support vector machine.  |
IJCNN  |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | S. K. Panda, Arnab Roy 0001, P. P. Chakrabarti, Rajeev Kumar |
Simulation Based Verification using Temporally Attributed Boolean Logic.  |
VLSI Design  |
2007 |
DBLP DOI BibTeX RDF |
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| 1 | Rajeev Kumar, Rahul Chaudhry, Dipankar Das 0002, Vibha Rathi, S. K. Panda, P. P. Chakrabarti |
SystemC Modeling and Validation of A RISC Processor System.  |
FDL  |
2006 |
DBLP BibTeX RDF |
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| 1 | Arnab Roy 0001, S. K. Panda, Rajeev Kumar, P. P. Chakrabarti |
A framework for systematic validation and debugging of pipeline simulators.  |
ACM Trans. Design Autom. Electr. Syst.  |
2005 |
DBLP DOI BibTeX RDF |
Simulation-based verification, dataflow equivalence, pipeline validation, design space exploration, instruction scheduling, pipelined architectures |
Displaying result #1 - #9 of 9 (100 per page; Change: )
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