Search results for "SAMOS"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Sander van der Maar, Kees Joost Batenburg, Jan Sijbers	Experiences with Cell-BE and GPU for Tomography.	SAMOS	2009	DBLP DOI BibTeX RDF
1	Roberto Giorgi, Zdravko Popovic, Nikola Puzovic	Implementing Fine/Medium Grained TLP Support in a Many-Core Architecture.	SAMOS	2009	DBLP DOI BibTeX RDF	DTA, many-core architectures
1	Luigi Carro, Stephan Wong	Introduction to the Future of Reconfigurable Computing and Processor Architectures.	SAMOS	2009	DBLP DOI BibTeX RDF
1	Ying Xu, Aabhas S. Agarwal, Brian T. Davis	Prediction in Dynamic SDRAM Controller Policies.	SAMOS	2009	DBLP DOI BibTeX RDF	Access Control Policy, Memory Latency, SDRAM
1	Roberto Airoldi, Fabio Garzia, Tapani Ahonen, Dragomir Milojevic, Jari Nurmi	Implementation of W-CDMA Cell Search on a FPGA Based Multi-Processor System-on-Chip with Power Management.	SAMOS	2009	DBLP DOI BibTeX RDF
1	Rainer Buchty, Mario Kicherer, David Kramer, Wolfgang Karl	An Embrace-and-Extend Approach to Managing the Complexity of Future Heterogeneous Systems.	SAMOS	2009	DBLP DOI BibTeX RDF
1	Cédric Augonnet, Samuel Thibault, Raymond Namyst, Maik Nijhuis	Exploiting the Cell/BE Architecture with the StarPU Unified Runtime System.	SAMOS	2009	DBLP DOI BibTeX RDF
1	Ronald G. Dreslinski, David Fick, David Blaauw, Dennis Sylvester, Trevor N. Mudge	Reconfigurable Multicore Server Processors for Low Power Operation.	SAMOS	2009	DBLP DOI BibTeX RDF	Server Architectures, Low Power, Reconfigurable
1	Richard Membarth, Frank Hannig, Hritam Dutta, Jürgen Teich	Efficient Mapping of Multiresolution Image Filtering Algorithms on Graphics Processors.	SAMOS	2009	DBLP DOI BibTeX RDF
1	Yale N. Patt	What Else Is Broken? Can We Fix It?	SAMOS	2009	DBLP DOI BibTeX RDF
1	Roya Choupani, Stephan Wong, Mehmet R. Tolun	Multiple Description Scalable Coding for Video Transmission over Unreliable Networks.	SAMOS	2009	DBLP DOI BibTeX RDF	Scalable Video Coding, Multiple Description Coding, Multimedia Transmission
1	Nainesh Agarwal, Nikitas J. Dimopoulos	Towards Automated FSMD Partitioning for Low Power Using Simulated Annealing.	SAMOS	2009	DBLP DOI BibTeX RDF
1	Ismo Hänninen, Jarmo Takala	Radix-4 Recoded Multiplier on Quantum-Dot Cellular Automata.	SAMOS	2009	DBLP DOI BibTeX RDF	nanotechnology, multiplication, arithmetic, QCA
1	Kevin Martin, Christophe Wolinski, Krzysztof Kuchcinski, Antoine Floch, François Charot	Constraint-Driven Identification of Application Specific Instructions in the DURASE System.	SAMOS	2009	DBLP DOI BibTeX RDF
1	Tero Rintaluoma, Timo Reinikka, Joona Rouvinen, Jani Boutellier, Pekka Jääskeläinen, Olli Silvén	Programmable Accelerators for Reconfigurable Video Decoder.	SAMOS	2009	DBLP DOI BibTeX RDF
1	Per Karlström, Dake Liu	NoGAP: A Micro Architecture Construction Framework.	SAMOS	2009	DBLP DOI BibTeX RDF
1	Yahya Jan, Lech Józwiak	CABAC Accelerator Architectures for Video Compression in Future Multimedia: A Survey.	SAMOS	2009	DBLP DOI BibTeX RDF	RC hardware architectures, UHDTV, H.264/AVC, video compression, accelerators, multimedia processing, CABAC
1	Pavel G. Zaykov, Georgi Kuzmanov, Georgi Nedeltchev Gaydadjiev	Reconfigurable Multithreading Architectures: A Survey.	SAMOS	2009	DBLP DOI BibTeX RDF
1	Pieter Bellens, Josep M. Pérez, Rosa M. Badia, Jesús Labarta	Exploiting Locality on the Cell/B.E. through Bypassing.	SAMOS	2009	DBLP DOI BibTeX RDF
1	Dmitry Nadezhkin, Sjoerd Meijer, Todor Stefanov, Ed F. Deprettere	Realizing FIFO Communication When Mapping Kahn Process Networks onto the Cell.	SAMOS	2009	DBLP DOI BibTeX RDF	distributed FIFO communication, the Cell BE platform, Models of Computation, Kahn Process Networks
1	Koen Bertels, Nikitas J. Dimopoulos, Cristina Silvano, Stephan Wong (eds.)	Embedded Computer Systems: Architectures, Modeling, and Simulation, 9th International Workshop, SAMOS 2009, Samos, Greece, July 20-23, 2009. Proceedings	SAMOS	2009	DBLP DOI BibTeX RDF
1	Huynh Phung Huynh, Tulika Mitra	Runtime Adaptive Extensible Embedded Processors - A Survey.	SAMOS	2009	DBLP DOI BibTeX RDF
1	Shinichi Kato, Minoru Watanabe	Inversion/Non-inversion Implementation for an 11, 424 Gate-Count Dynamic Optically Reconfigurable Gate Array VLSI.	SAMOS	2009	DBLP DOI BibTeX RDF
1	Alexander Monakov, Arutyun Avetisyan	Implementing Blocked Sparse Matrix-Vector Multiplication on NVIDIA GPUs.	SAMOS	2009	DBLP DOI BibTeX RDF
1	Kingshuk Karuri, Rainer Leupers, Gerd Ascheid, Heinrich Meyr	A Generic Design Flow for Application Specific Processor Customization through Instruction-Set Extensions (ISEs).	SAMOS	2009	DBLP DOI BibTeX RDF
1	Ed F. Deprettere, Ana Lucia Varbanescu	Introduction to Mastering Cell BE and GPU Execution Platforms.	SAMOS	2009	DBLP DOI BibTeX RDF
1	Carlos S. de La Lama, Pekka Jääskeläinen, Jarmo Takala	Programmable and Scalable Architecture for Graphics Processing Units.	SAMOS	2009	DBLP DOI BibTeX RDF	TTA, GPU, GPGPU, VLIW, OpenGL, GLSL, LLVM
1	Paul M. Carpenter, Alex Ramírez, Eduard Ayguadé	The Abstract Streaming Machine: Compile-Time Performance Modelling of Stream Programs on Heterogeneous Multiprocessors.	SAMOS	2009	DBLP DOI BibTeX RDF
1	Narasinga Rao Miniskar, Elena Hammari, Satyakiran Munaga, Stylianos Mamagkakis, Per Gunnar Kjeldsberg, Francky Catthoor	Scenario Based Mapping of Dynamic Applications on MPSoC: A 3D Graphics Case Study.	SAMOS	2009	DBLP DOI BibTeX RDF
1	Christian Schäck, Wolfgang Heenes, Rolf Hoffmann	A Multiprocessor Architecture with an Omega Network for the Massively Parallel Model GCA.	SAMOS	2009	DBLP DOI BibTeX RDF	Global Cellular Automata, FPGA, multiprocessor architecture, omega network
1	Sascha Uhrig	Evaluation of Different Multithreaded and Multicore Processor Configurations for SoPC.	SAMOS	2009	DBLP DOI BibTeX RDF
1	Peter Westermann, Hartmut Schröder	Modeling Scalable SIMD DSPs in LISA.	SAMOS	2009	DBLP DOI BibTeX RDF	SIMD DSPs, Scalable Processor Models, LISA
1	Walid A. Najjar, Jason R. Villarreal	Reconfigurable Computing in the New Age of Parallelism.	SAMOS	2009	DBLP DOI BibTeX RDF	FPGAs, Reconfigurable computing
1	Frederico Pratas, Leonel Sousa	Applying the Stream-Based Computing Model to Design Hardware Accelerators: A Case Study.	SAMOS	2009	DBLP DOI BibTeX RDF
1	Toktam Taghavi, Mark Thompson, Andy D. Pimentel	Visualization of Computer Architecture Simulation Data for System-Level Design Space Exploration.	SAMOS	2009	DBLP DOI BibTeX RDF	Computer architecture simulation, coordination, design space exploration, multiple views, linked views, exploratory visualization
1	Carlo Galuzzi	Introduction to Instruction-Set Customization.	SAMOS	2009	DBLP DOI BibTeX RDF
1	Bernhard Huber, Roman Obermaisser	A Comparison of NoTA and GENESYS.	SAMOS	2009	DBLP DOI BibTeX RDF	Cross-Domain Architectures, Embedded Systems
1	Janne Rintanen, Jukka Suhonen, Marko Hännikäinen, Timo D. Hämäläinen	Application Server for Wireless Sensor Networks.	SAMOS	2008	DBLP DOI BibTeX RDF
1	Alexis Vander Biest, Alienor Richard, Dragomir Milojevic, Frédéric Robert	A Multi-objective and Hierarchical Exploration Tool for SoC Performance Estimation.	SAMOS	2008	DBLP DOI BibTeX RDF
1	Konstantin Septinus, Christian Grimm, Vladislav Rumyantsev, Peter Pirsch	On the Benefit of Caching Traffic Flow Data in the Link Buffer.	SAMOS	2008	DBLP DOI BibTeX RDF	Connection Cache, Link Buffer, Transmission Control Protocol, TCP, Table Lookup, Network Interface
1	Chris R. Jesshope, Jean-Marc Philippe, Michiel W. van Tol	An Architecture and Protocol for the Management of Resources in Ubiquitous and Heterogeneous Systems Based on the SVP Model of Concurrency.	SAMOS	2008	DBLP DOI BibTeX RDF	concurrency models, resource management, heterogeneous systems, ubiquitous systems, market models
1	Emre Özer, Ronald G. Dreslinski, Trevor N. Mudge, Stuart Biles, Krisztián Flautner	Energy-Efficient Simultaneous Thread Fetch from Different Cache Levels in a Soft Real-Time SMT Processor.	SAMOS	2008	DBLP DOI BibTeX RDF	Real-time, Energy Efficiency, Caches, Embedded Processors, SMT
1	Chris R. Jesshope	Introduction to Programming Multicores.	SAMOS	2008	DBLP DOI BibTeX RDF
1	Vladimír Guzma, Pekka Jääskeläinen, Pertti Kellomäki, Jarmo Takala	Impact of Software Bypassing on Instruction Level Parallelism and Register File Traffic.	SAMOS	2008	DBLP DOI BibTeX RDF
1	Perfecto Mariño, Fernando Pérez-Fontán, Miguel Angel Domínguez, Santiago Otero	Climate and Biological Sensor Network.	SAMOS	2008	DBLP DOI BibTeX RDF	sensor networks, sensor systems
1	Rashid Muhammad, Ludovic Apvrille, Renaud Pacalet	Evaluation of ASIPs Design with LISATek.	SAMOS	2008	DBLP DOI BibTeX RDF	LISATek, ASIPs, JPEG, Customized Instructions
1	Calin Glitia, Pierre Boulet	High Level Loop Transformations for Systematic Signal Processing Embedded Applications.	SAMOS	2008	DBLP DOI BibTeX RDF	Multidimensional Dataflow, optimizations, loop transformations
1	Costas Argyrides, Stephania Loizidou, Dhiraj K. Pradhan	Area Reliability Trade-Off in Improved Reed Muller Coding.	SAMOS	2008	DBLP DOI BibTeX RDF
1	Sebastian Isaza, Friman Sánchez, Georgi Gaydadjiev, Alex Ramírez, Mateo Valero	Preliminary Analysis of the Cell BE Processor Limitations for Sequence Alignment Applications.	SAMOS	2008	DBLP DOI BibTeX RDF
1	Thorsten von Sydow, Holger Blume, Götz Kappen, Tobias G. Noll	ASIP-eFPGA Architecture for Multioperable GNSS Receivers.	SAMOS	2008	DBLP DOI BibTeX RDF	arithmetic oriented eFPGA, multioperable GNSS, ASIP
1	Scott Fischaber, John McAllister, Roger Woods	Memory-Centric Hardware Synthesis from Dataflow Models.	SAMOS	2008	DBLP DOI BibTeX RDF	template matching, dataflow, hardware synthesis
1	Mladen Berekovic, Nikitas J. Dimopoulos, Stephan Wong (eds.)	Embedded Computer Systems: Architectures, Modeling, and Simulation, 8th International Workshop, SAMOS 2008, Samos, Greece, July 21-24, 2008. Proceedings	SAMOS	2008	DBLP BibTeX RDF
1	Daniel Iancu, Mayan Moudgill, John Glossner, Jarmo Takala	Efficient Reed-Solomon Iterative Decoder Using Galois Field Instruction Set.	SAMOS	2008	DBLP DOI BibTeX RDF
1	Stanley Jaddoe, Andy D. Pimentel	Signature-Based Calibration of Analytical System-Level Performance Models.	SAMOS	2008	DBLP DOI BibTeX RDF
1	John McAllister	Introduction to System Level Design for Heterogeneous Systems.	SAMOS	2008	DBLP DOI BibTeX RDF
1	Xu Guo, Zhimin Chen, Patrick Schaumont	Energy and Performance Evaluation of an FPGA-Based SoC Platform with AES and PRESENT Coprocessors.	SAMOS	2008	DBLP DOI BibTeX RDF
1	Stephen Neuendorffer, Kees A. Vissers	Streaming Systems in FPGAs.	SAMOS	2008	DBLP DOI BibTeX RDF	digital convergence, FPGAs, dataflow
1	Elfed Lewis, John Clifford, Colin Fitzpatrick, Gerard Dooly, Weizhong Zhao, Tong Sun, K. T. V. Grattan, James Lucas, Martin Degner, Hartmut Ewald, Steffen Lochmann, Gero Bramann, Edoardo Merlone-Borla, Flavio Gili	Monitoring of Environmentally Hazardous Exhaust Emissions from Cars Using Optical Fibre Sensors.	SAMOS	2008	DBLP DOI BibTeX RDF	mid-infrared gas detection, UV gas detection, in-fibre Bragg grating temperature sensor, optical fibre sensor, vehicle emission detection
1	Francesca Palumbo, Simone Secchi, Danilo Pani, Luigi Raffo	A Novel Non-exclusive Dual-Mode Architecture for MPSoCs-Oriented Network on Chip Designs.	SAMOS	2008	DBLP DOI BibTeX RDF	Dual-mode switching, Non-exclusive switching, Networks on Chip, Circuit switching
1	Anthony Blake, Richard Nelson	Scalable Architecture for Prefix Preserving Anonymization of IP Addresses.	SAMOS	2008	DBLP DOI BibTeX RDF
1	Teemu Pitkänen, Vesa-Matti Hartikainen, Nirav Dave, Gopal Raghavan	802.15.3 Transmitter: A Fast Design Cycle Using OFDM Framework in Bluespec.	SAMOS	2008	DBLP DOI BibTeX RDF
1	James C. Brodman, Basilio B. Fraguela, María Jesús Garzarán, David A. Padua	Design Issues in Parallel Array Languages for Shared Memory.	SAMOS	2008	DBLP DOI BibTeX RDF	parallel programming, shared memory, tiling, data parallelism
1	Jukka Suhonen, Mikko Kohvakka, Marko Hännikäinen, Timo D. Hämäläinen	Embedded Software Architecture for Diagnosing Network and Node Failures in Wireless Sensor Networks.	SAMOS	2008	DBLP DOI BibTeX RDF
1	Torsten Limberg, Bastian Ristau, Gerhard Fettweis	A Real-Time Programming Model for Heterogeneous MPSoCs.	SAMOS	2008	DBLP DOI BibTeX RDF
1	William Plishker, Nimish Sane, Mary Kiemb, Shuvra S. Bhattacharyya	Heterogeneous Design in Functional DIF.	SAMOS	2008	DBLP DOI BibTeX RDF	Signal Processing, Heterogeneous, Dataflow
1	Andy D. Pimentel, Todor Stefanov, Hristo Nikolov, Mark Thompson, Simon Polstra, Ed F. Deprettere	Tool Integration and Interoperability Challenges of a System-Level Design Flow: A Case Study.	SAMOS	2008	DBLP DOI BibTeX RDF
1	Kamana Sigdel, Mark Thompson, Andy D. Pimentel, Todor Stefanov, Koen Bertels	System-Level Design Space Exploration of Dynamic Reconfigurable Architectures.	SAMOS	2008	DBLP DOI BibTeX RDF
1	Michael A. Gora, Eric Simpson, Patrick Schaumont	Intellectual Property Protection for Embedded Sensor Nodes.	SAMOS	2008	DBLP DOI BibTeX RDF
1	Yale N. Patt	Can They Be Fixed: Some Thoughts After 40 Years in the Business.	SAMOS	2008	DBLP DOI BibTeX RDF
1	Ismo Hänninen, Jarmo Takala	Arithmetic Design on Quantum-Dot Cellular Automata Nanotechnology.	SAMOS	2008	DBLP DOI BibTeX RDF	Nanotechnology, arithmetic, digital design
1	Mauri Kuorilehto, Timo Alho, Marko Hännikäinen, Timo D. Hämäläinen	SensorOS: A New Operating System for Time Critical WSN Applications.	SAMOS	2007	DBLP DOI BibTeX RDF
1	Stamatis Vassiliadis, Mladen Berekovic, Timo D. Hämäläinen (eds.)	Embedded Computer Systems: Architectures, Modeling, and Simulation, 7th International Workshop, SAMOS 2007, Samos, Greece, July 16-19, 2007, Proceedings	SAMOS	2007	DBLP BibTeX RDF
1	Dong-Min Son, Young-Bae Ko	k + Neigh : An Energy Efficient Topology Control for Wireless Sensor Networks.	SAMOS	2007	DBLP DOI BibTeX RDF
1	Mark Woh, Sangwon Seo, Hyunseok Lee, Yuan Lin, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner	The Next Generation Challenge for Software Defined Radio.	SAMOS	2007	DBLP DOI BibTeX RDF
1	Marco Lanuzza, Stefania Perri, Pasquale Corsonello	MORA: A New Coarse-Grain Reconfigurable Array for High Throughput Multimedia Processing.	SAMOS	2007	DBLP DOI BibTeX RDF	coarse-grain array, multimedia applications, Reconfigurable systems
1	Thomas Schuster, Bruno Bougard, Praveen Raghavan, Robert Priewasser, David Novo, Liesbet Van der Perre, Francky Catthoor	Design of a Low Power Pre-synchronization ASIP for Multimode SDR Terminals.	SAMOS	2007	DBLP DOI BibTeX RDF
1	Tseesuren Batsuuri, Je-Hoon Lee, Kyoung-Rok Cho	Power Efficient Co-simulation Framework for a Wireless Application Using Platform Based SoC.	SAMOS	2007	DBLP DOI BibTeX RDF	Platform based SoC, HW/SW co-simulation, verification
1	Hendrik Eeckhaut, Harald Devos, Philippe Faes, Mark Christiaens, Dirk Stroobandt	FPGA Design Methodology for a Wavelet-Based Scalable Video Decoder.	SAMOS	2007	DBLP DOI BibTeX RDF
1	Ari Kulmala, Erno Salminen, Timo D. Hämäläinen	Evaluating Large System-on-Chip on Multi-FPGA Platform.	SAMOS	2007	DBLP DOI BibTeX RDF
1	Michael G. Benjamin, David R. Kaeli	Stream Image Processing on a Dual-Core Embedded System.	SAMOS	2007	DBLP DOI BibTeX RDF
1	Holger Flatt, Sebastian Hesselbarth, Sebastian Flügel, Peter Pirsch	A Modular Coprocessor Architecture for Embedded Real-Time Image and Video Signal Processing.	SAMOS	2007	DBLP DOI BibTeX RDF
1	Ka Lok Man, Andrea Fedeli, Michele Mercaldi, Menouer Boubekeur, Michel P. Schellekens	SC2SCFL: Automated SystemC to SystemCFL Translation.	SAMOS	2007	DBLP DOI BibTeX RDF
1	Pekka Jääskeläinen, Vladimír Guzma, Jarmo Takala	Resource Conflict Detection in Simulation of Function Unit Pipelines.	SAMOS	2007	DBLP DOI BibTeX RDF
1	Pepijn J. de Langen, Ben H. H. Juurlink	Trade-Offs Between Voltage Scaling and Processor Shutdown for Low-Energy Embedded Multiprocessors.	SAMOS	2007	DBLP DOI BibTeX RDF
1	Bastian Ristau, Gerhard Fettweis	Mapping and Performance Evaluation for Heterogeneous MP-SoCs Via Packing.	SAMOS	2007	DBLP DOI BibTeX RDF
1	Thomas A. M. Bernard, Chris R. Jesshope, Peter M. W. Knijnenburg	Strategies for Compiling µ TC to Novel Chip Multiprocessors.	SAMOS	2007	DBLP DOI BibTeX RDF
1	John Glossner, Daniel Iancu, Mayan Moudgill, Michael J. Schulte, Stamatis Vassiliadis	Trends in Low Power Handset Software Defined Radio.	SAMOS	2007	DBLP DOI BibTeX RDF	DSP, Software Defined Radio, SDR, Multithreaded processors
1	Jan W. M. Jacobs, Leroy van Engelen, Jan Kuper, Gerard J. M. Smit	Image Quantisation on a Massively Parallel Embedded Processor.	SAMOS	2007	DBLP DOI BibTeX RDF
1	Anders Nilsson, Dake Liu	Area Efficient Fully Programmable Baseband Processors.	SAMOS	2007	DBLP DOI BibTeX RDF
1	Mauri Kuorilehto, Jukka Suhonen, Marko Hännikäinen, Timo D. Hämäläinen	Tool-Aided Design and Implementation of Indoor Surveillance Wireless Sensor Network.	SAMOS	2007	DBLP DOI BibTeX RDF
1	Chia-han Lee, Wayne Wolf	Design Methodology for Software Radio Systems.	SAMOS	2007	DBLP DOI BibTeX RDF	baseband, methodology, convex optimization, ADC, RF, front-ends, Software radio
1	Norbert Esser, Renga Sundararajan, Joachim Trescher	Improving TriMedia Cache Performance by Profile Guided Code Reordering.	SAMOS	2007	DBLP DOI BibTeX RDF	cache, profiling, code layout
1	Seungjae Baek, Jongmoo Choi, Donghee Lee, Sam H. Noh	Model and Validation of Block Cleaning Cost for Flash Memory.	SAMOS	2007	DBLP DOI BibTeX RDF	block cleaning, model, validation, Flash memory
1	Max R. de O. Schultz, Alexandre K. I. Mendonça, Felipe G. Carvalho, Olinto J. V. Furtado, Luiz C. V. dos Santos	A Model-Driven Automatically-Retargetable Debug Tool for Embedded Systems.	SAMOS	2007	DBLP DOI BibTeX RDF
1	Teemu Pitkänen, Tero Partanen, Jarmo Takala	Low-Power Twiddle Factor Unit for FFT Computation.	SAMOS	2007	DBLP DOI BibTeX RDF
1	Paolo Bonzini, Dilek Harmanci, Laura Pozzi	A Study of Energy Saving in Customizable Processors.	SAMOS	2007	DBLP DOI BibTeX RDF
1	Humberto Calderon, Carlo Galuzzi, Georgi Gaydadjiev, Stamatis Vassiliadis	High-Bandwidth Address Generation Unit.	SAMOS	2007	DBLP DOI BibTeX RDF
1	Sascha Uhrig, Jörg Mische, Theo Ungerer	An IP Core for Embedded Java Systems.	SAMOS	2007	DBLP DOI BibTeX RDF	Implantable Systems, Embedded System-on-a-Chip Implementations, Real-time Embedded Systems, Multithreaded Processors, Java Processor, Embedded Operating Systems
1	Taewook Oh, Youngmin Yi, Soonhoi Ha	Communication Architecture Simulation on the Virtual Synchronization Framework.	SAMOS	2007	DBLP DOI BibTeX RDF
1	Zhong-Yi Jin, Curt Schurgers, Rajesh K. Gupta	An Embedded Platform with Duty-Cycled Radio and Processing Subsystems for Wireless Sensor Networks.	SAMOS	2007	DBLP DOI BibTeX RDF

Publications at "SAMOS"( http://dblp.L3S.de/Venues/SAMOS )