Search results for "Sarita V. Adve"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Hans-Juergen Boehm, Sarita V. Adve	You don't know jack about shared variables or memory models.	Commun. ACM	2012	DBLP DOI BibTeX RDF
1	Siva Kumar Sastry Hari, Sarita V. Adve, Helia Naeimi, Pradeep Ramachandran	Relyzer: exploiting application-level fault equivalence to analyze application resiliency to transient faults.	ASPLOS	2012	DBLP DOI BibTeX RDF
1	Andrea Pellegrini, Robert Smolinski, Lei Chen, Xin Fu, Siva Kumar Sastry Hari, Junhao Jiang, Sarita V. Adve, Todd M. Austin, Valeria Bertacco	CrashTest'ing SWAT: Accurate, gate-level evaluation of symptom-based resiliency solutions.	DATE	2012	DBLP BibTeX RDF
1	Sarita V. Adve, Hans-Juergen Boehm	Memory Models.	Encyclopedia of Parallel Computing	2011	DBLP DOI BibTeX RDF
1	Byn Choi, Rakesh Komuravelli, Hyojin Sung, Robert Smolinski, Nima Honarmand, Sarita V. Adve, Vikram S. Adve, Nicholas P. Carter, Ching-Tsun Chou	DeNovo: Rethinking the Memory Hierarchy for Disciplined Parallelism.	PACT	2011	DBLP DOI BibTeX RDF
1	Robert L. Bocchino Jr., Stephen Heumann, Nima Honarmand, Sarita V. Adve, Vikram S. Adve, Adam Welc, Tatiana Shpeisman	Safe nondeterminism in a deterministic-by-default parallel language.	POPL	2011	DBLP DOI BibTeX RDF
1	Sarita V. Adve	Rethinking shared-memory languages and hardware.	ICS	2011	DBLP DOI BibTeX RDF
1	Dimitris Gizopoulos, Mihalis Psarakis, Sarita V. Adve, Pradeep Ramachandran, Siva Kumar Sastry Hari, Daniel J. Sorin, Albert Meixner, A. Biswas, Xavier Vera	Architectures for online error detection and recovery in multicore processors.	DATE	2011	DBLP BibTeX RDF
1	Sarita V. Adve, Hans-Juergen Boehm	Memory models: a case for rethinking parallel languages and hardware.	Commun. ACM	2010	DBLP DOI BibTeX RDF
1	Sarita V. Adve	Data races are evil with no exceptions: technical perspective.	Commun. ACM	2010	DBLP DOI BibTeX RDF
1	Byn Choi, Rakesh Komuravelli, Victor Lu, Hyojin Sung, Robert L. Bocchino Jr., Sarita V. Adve, John C. Hart	Parallel SAH k-D tree construction.	High Performance Graphics	2010	DBLP BibTeX RDF
1	Vibhore Vardhan, Wanghong Yuan, Albert F. Harris III, Sarita V. Adve, Robin Kravets, Klara Nahrstedt, Daniel Grobe Sachs, Douglas L. Jones	GRACE-2: integrating fine-grained application adaptation with global adaptation for saving energy.	IJES	2009	DBLP DOI BibTeX RDF
1	Siva Kumar Sastry Hari, Man-Lap Li, Pradeep Ramachandran, Byn Choi, Sarita V. Adve	mSWAT: low-cost hardware fault detection and diagnosis for multicore systems.	MICRO	2009	DBLP DOI BibTeX RDF	architecture, error detection, fault injection, multicore processors
1	Sarita V. Adve	Memory models: a case for rethinking parallel languages and hardware.	SPAA	2009	DBLP DOI BibTeX RDF	safe programming, memory models, multicore architecture, memory consistency models
1	Robert L. Bocchino Jr., Vikram S. Adve, Danny Dig, Sarita V. Adve, Stephen Heumann, Rakesh Komuravelli, Jeffrey Overbey, Patrick Simmons, Hyojin Sung, Mohsen Vakilian	A type and effect system for deterministic parallel Java.	OOPSLA	2009	DBLP DOI BibTeX RDF	deterministic parallelism, determinism, effects, commutativity, effect systems
1	Sarita V. Adve	Memory models: a case for rethinking parallel languages and hardware.	PODC	2009	DBLP DOI BibTeX RDF	safe programming, memory models, multicore architecture, memory consistency models
1	Man-Lap Li, Pradeep Ramachandran, Ulya R. Karpuzcu, Siva Kumar Sastry Hari, Sarita V. Adve	Accurate microarchitecture-level fault modeling for studying hardware faults.	HPCA	2009	DBLP DOI BibTeX RDF
1	Sarita V. Adve, David Brooks, Craig B. Zilles	Guest Editors' Introduction: Top Picks from the Computer Architecture Conferences of 2007.	IEEE Micro	2008	DBLP DOI BibTeX RDF	Top Picks, reliability, computer architecture, transactional memory, variability, on-chip interconnects, compiler-architecture interactions, memory system design
1	Hans-Juergen Boehm, Sarita V. Adve	Foundations of the C++ concurrency memory model.	PLDI	2008	DBLP DOI BibTeX RDF	trylock, c++, memory model, data race, sequential consistency, memory consistency
1	Xiaodong Li, Sarita V. Adve, Pradip Bose, Jude A. Rivers	Online Estimation of Architectural Vulnerability Factor for Soft Errors.	ISCA	2008	DBLP DOI BibTeX RDF
1	Pradeep Ramachandran, Sarita V. Adve, Pradip Bose, Jude A. Rivers	Metrics for Architecture-Level Lifetime Reliability Analysis.	ISPASS	2008	DBLP DOI BibTeX RDF
1	Man-Lap Li, Pradeep Ramachandran, Swarup Kumar Sahoo, Sarita V. Adve, Vikram S. Adve, Yuanyuan Zhou	Understanding the propagation of hard errors to software and implications for resilient system design.	ASPLOS	2008	DBLP DOI BibTeX RDF	architecture, error detection, fault injection, permanent fault
1	Swarup Kumar Sahoo, Man-Lap Li, Pradeep Ramachandran, Sarita V. Adve, Vikram S. Adve, Yuanyuan Zhou	Using likely program invariants to detect hardware errors.	DSN	2008	DBLP DOI BibTeX RDF
1	Man-Lap Li, Pradeep Ramachandran, Swarup Kumar Sahoo, Sarita V. Adve, Vikram S. Adve, Yuanyuan Zhou	Trace-based microarchitecture-level diagnosis of permanent hardware faults.	DSN	2008	DBLP DOI BibTeX RDF
1	Xiaodong Li, Ritu Gupta, Sarita V. Adve, Yuanyuan Zhou	Cross-component energy management: Joint adaptation of processor and memory.	TACO	2007	DBLP DOI BibTeX RDF	low-power design, memory, adaptive systems, processor, Energy management, performance guarantee, control algorithms
1	Ruchira Sasanka, Man-Lap Li, Sarita V. Adve, Yen-Kuang Chen, Eric Debes	ALP: Efficient support for all levels of parallelism for complex media applications.	TACO	2007	DBLP DOI BibTeX RDF	media applications, multimedia, Parallelism, SIMD, vector, TLP, DLP, data-level parallelism
1	Xiaodong Li, Sarita V. Adve, Pradip Bose, Jude A. Rivers	Architecture-Level Soft Error Analysis: Examining the Limits of Common Assumptions.	DSN	2007	DBLP DOI BibTeX RDF
1	Soyeon Park, Weihang Jiang, Yuanyuan Zhou, Sarita V. Adve	Managing energy-performance tradeoffs for multithreaded applications on multiprocessor architectures.	SIGMETRICS	2007	DBLP DOI BibTeX RDF	energy and performance tradeoffs, memory energy management, multithreaded applications, low power design
1	Wanghong Yuan, Klara Nahrstedt, Sarita V. Adve, Douglas L. Jones, Robin Kravets	GRACE-1: Cross-Layer Adaptation for Multimedia Quality and Battery Energy.	IEEE Trans. Mob. Comput.	2006	DBLP DOI BibTeX RDF	support for adaptation, real-time systems, embedded systems, Energy-aware systems
1	Jayanth Srinivasan, Sarita V. Adve, Pradip Bose, Jude A. Rivers	Lifetime Reliability: Toward an Architectural Solution.	IEEE Micro	2005	DBLP DOI BibTeX RDF	Lifetime reliability, RAMP, power management, scaling, DRM, MTTF
1	Sarita V. Adve, Pia Sanda	Guest Editors' Introduction: Reliability-Aware Microarchitecture.	IEEE Micro	2005	DBLP DOI BibTeX RDF	Reliability-aware microarchitecture, reliability management, soft errors, CMOS scaling
1	Christopher J. Hughes, Sarita V. Adve	Memory-side prefetching for linked data structures for processor-in-memory systems.	J. Parallel Distrib. Comput.	2005	DBLP DOI BibTeX RDF
1	Xiaodong Li, Zhenmin Li, Yuanyuan Zhou, Sarita V. Adve	Performance directed energy management for main memory and disks.	TOS	2005	DBLP DOI BibTeX RDF	Disk energy management, memory energy management, multiple-power mode device, low-power design, adaptation algorithms, performance guarantee, control algorithms
1	Jayanth Srinivasan, Sarita V. Adve, Pradip Bose, Jude A. Rivers	Exploiting Structural Duplication for Lifetime Reliability Enhancement.	ISCA	2005	DBLP DOI BibTeX RDF
1	Xiaodong Li, Sarita V. Adve, Pradip Bose, Jude A. Rivers	SoftArch: An Architecture Level Tool for Modeling and Analyzing Soft Errors.	DSN	2005	DBLP DOI BibTeX RDF
1	Jeremy Manson, William Pugh, Sarita V. Adve	The Java memory model.	POPL	2005	DBLP DOI BibTeX RDF	Java, concurrency, multithreading, memory model
1	Xiaodong Li, Zhenmin Li, Pin Zhou, Yuanyuan Zhou, Sarita V. Adve, Sanjeev Kumar	Performance-Directed Energy Management for Storage Systems.	IEEE Micro	2004	DBLP DOI BibTeX RDF
1	Jayanth Srinivasan, Sarita V. Adve, Pradip Bose, Jude A. Rivers	The Case for Lifetime Reliability-Aware Microprocessors.	ISCA	2004	DBLP DOI BibTeX RDF
1	Christopher J. Hughes, Sarita V. Adve	A Formal Approach to Frequent Energy Adaptations for Multimedia Applications.	ISCA	2004	DBLP DOI BibTeX RDF
1	Xiaodong Li, Zhenmin Li, Francis M. David, Pin Zhou, Yuanyuan Zhou, Sarita V. Adve, Sanjeev Kumar	Performance directed energy management for main memory and disks.	ASPLOS	2004	DBLP DOI BibTeX RDF	memory and disk energy management, multiple power mode device, low power design, adaptation algorithms, control algorithms
1	Gengbin Zheng, Terry Wilmarth, Orion Sky Lawlor, Laxmikant V. Kalé, Sarita V. Adve, David A. Padua, Philippe Guebelle	Performance Modeling and Programming Environments for Petaflops Computers and the Blue Gene Machine.	IPDPS Next Generation Software Program - NSFNGS - PI Workshop	2004	DBLP DOI BibTeX RDF
1	Jayanth Srinivasan, Sarita V. Adve, Pradip Bose, Jude A. Rivers	The Impact of Technology Scaling on Lifetime Reliability.	DSN	2004	DBLP DOI BibTeX RDF
1	Ruchira Sasanka, Sarita V. Adve, Yen-Kuang Chen, Eric Debes	The energy efficiency of CMP vs. SMT for multimedia workloads.	ICS	2004	DBLP DOI BibTeX RDF	multimedia, energy efficiency, CMP, SMT
1	Daniel Grobe Sachs, Sarita V. Adve, Douglas L. Jones	Cross-layer adaptive video coding to reduce energy on general-purpose processors.	ICIP	2003	DBLP BibTeX RDF
1	Jayanth Srinivasan, Sarita V. Adve	Predictive dynamic thermal management for multimedia applications.	ICS	2003	DBLP DOI BibTeX RDF	low power, thermal management, adaptive architectures
1	Christopher J. Hughes, Vijay S. Pai, Parthasarathy Ranganathan, Sarita V. Adve	RSIM: Simulating Shared-Memory Multiprocessors with ILP Processors.	IEEE Computer	2002	DBLP DOI BibTeX RDF
1	Shubhendu S. Mukherjee, Sarita V. Adve, Todd M. Austin, Joel S. Emer, Peter S. Magnusson	Performance Simulation Tools.	IEEE Computer	2002	DBLP DOI BibTeX RDF
1	Ruchira Sasanka, Christopher J. Hughes, Sarita V. Adve	Joint local and global hardware adaptations for energy.	ASPLOS	2002	DBLP DOI BibTeX RDF
1	Rohit Jain, Christopher J. Hughes, Sarita V. Adve	Soft Real- Time Scheduling on Simultaneous Multithreaded Processors. (PDF / PS)	IEEE Real-Time Systems Symposium	2002	DBLP DOI BibTeX RDF
1	Christopher J. Hughes, Praful Kaul, Sarita V. Adve, Rohit Jain, Chanik Park, Jayanth Srinivasan	Variability in the execution of multimedia applications and implications for architecture.	ISCA	2001	DBLP DOI BibTeX RDF
1	Vijay S. Pai, Sarita V. Adve	Comparing and Combining Read Miss Clustering and Software Prefetching.	IEEE PACT	2001	DBLP DOI BibTeX RDF
1	Christopher J. Hughes, Jayanth Srinivasan, Sarita V. Adve	Saving energy with architectural and frequency adaptations for multimedia applications.	MICRO	2001	DBLP DOI BibTeX RDF
1	Vijay S. Pai, Sarita V. Adve	Code Transformations to Improve Memory Parallelism.	J. Instruction-Level Parallelism	2000	DBLP BibTeX RDF
1	Parthasarathy Ranganathan, Sarita V. Adve, Norman P. Jouppi	Reconfigurable caches and their application to media processing.	ISCA	2000	DBLP DOI BibTeX RDF
1	Vijay S. Pai, Parthasarathy Ranganathan, Hazim Abdel-Shafi, Sarita V. Adve	The Impact of Exploiting Instruction-Level Parallelism on Shared-Memory Multiprocessors.	IEEE Trans. Computers	1999	DBLP DOI BibTeX RDF	performance evaluation, instruction-level parallelism, Shared-memory multiprocessors, software prefetching
1	Parthasarathy Ranganathan, Sarita V. Adve, Norman P. Jouppi	Performance of Image and Video Processing with General-Purpose Processors and Media ISA Extensions.	ISCA	1999	DBLP DOI BibTeX RDF
1	Vijay S. Pai, Sarita V. Adve	Code Transformations to Improve Memory Parallelism. (PDF / PS)	MICRO	1999	DBLP DOI BibTeX RDF
1	Murthy Durbhakula, Vijay S. Pai, Sarita V. Adve	Improving the Accuracy vs. Speed Tradeoff for Simulating Shared-Memory Multiprocessors with ILP Processors.	HPCA	1999	DBLP DOI BibTeX RDF
1	Sarita V. Adve, Mark D. Hill	Retrospective: Weak Ordering - A New Definition.	25 Years ISCA: Retrospectives and Reprints	1998	DBLP DOI BibTeX RDF
1	Sarita V. Adve, Mark D. Hill	Weak Ordering - A New Definition.	25 Years ISCA: Retrospectives and Reprints	1998	DBLP DOI BibTeX RDF	shared-memory multiprocessor, sequential consistency, weak ordering
1	Daniel J. Sorin, Vijay S. Pai, Sarita V. Adve, Mary K. Vernon, David A. Wood	Analytic Evaluation of Shared-memory Systems with ILP Processors.	ISCA	1998	DBLP DOI BibTeX RDF
1	Parthasarathy Ranganathan, Kourosh Gharachorloo, Sarita V. Adve, Luiz André Barroso	Performance of Database Workloads on Shared-Memory Systems with Out-of-Order Processors.	ASPLOS	1998	DBLP DOI BibTeX RDF
1	Sarita V. Adve, Doug Burger, Rudolf Eigenmann, Alasdair Rawsthorne, Michael D. Smith, Catherine H. Gebotys, Mahmut T. Kandemir, David J. Lilja, Alok N. Choudhary, Jesse Zhixi Fang, Pen-Chung Yew	Changing Interaction of Compiler and Architecture.	IEEE Computer	1997	DBLP DOI BibTeX RDF
1	Parthasarathy Ranganathan, Vijay S. Pai, Hazim Abdel-Shafi, Sarita V. Adve	The Interaction of Software Prefetching with ILP Processors in Shared-Memory Systems.	ISCA	1997	DBLP DOI BibTeX RDF
1	Parthasarathy Ranganathan, Vijay S. Pai, Sarita V. Adve	Using Speculative Retirement and Larger Instruction Windows to Narrow the Performance Gap Between Memory Consistency Models.	SPAA	1997	DBLP DOI BibTeX RDF
1	Vijay S. Pai, Parthasarathy Ranganathan, Sarita V. Adve	The Impact of Instruction-Level Parallelism on Multiprocessor Performance and Simulation Methodology.	HPCA	1997	DBLP DOI BibTeX RDF
1	Hazim Abdel-Shafi, Jonathan Hall, Sarita V. Adve, Vikram S. Adve	An Evaluation of Fine-Grain Producer-Initiated Communication in Cache-Coherent Multiprocessors.	HPCA	1997	DBLP DOI BibTeX RDF
1	Sarita V. Adve, Kourosh Gharachorloo	Shared Memory Consistency Models: A Tutorial.	IEEE Computer	1996	DBLP DOI BibTeX RDF
1	Vijay S. Pai, Parthasarathy Ranganathan, Sarita V. Adve, Tracy Harton	An Evaluation of Memory Consistency Models for Shared-Memory Systems with ILP Processors.	ASPLOS	1996	DBLP DOI BibTeX RDF
1	Sarita V. Adve, Alan L. Cox, Sandhya Dwarkadas, Ramakrishnan Rajamony, Willy Zwaenepoel	A Comparison of Entry Consistency and Lazy Release Consistency Implementations.	HPCA	1996	DBLP DOI BibTeX RDF	parallel computation, shared memory, performance measurement, networks of workstations, consistency models
1	Sarita V. Adve, Mark D. Hill	A Unified Formalization of Four Shared-Memory Models.	IEEE Trans. Parallel Distrib. Syst.	1993	DBLP DOI BibTeX RDF	data-race-free-1, data-race-free-0, hazards and raceconditions, multiprocessors, shared memory systems, formalization, sequential consistency, weak ordering, shared-memory models, release consistency
1	Kourosh Gharachorloo, Sarita V. Adve, Anoop Gupta, John L. Hennessy, Mark D. Hill	Programming for Different Memory Consistency Models.	J. Parallel Distrib. Comput.	1992	DBLP DOI BibTeX RDF
1	Sarita V. Adve, Vikram S. Adve, Mark D. Hill, Mary K. Vernon	Comparison of Hardware and Software Cache Coherence Schemes.	ISCA	1991	DBLP DOI BibTeX RDF
1	Sarita V. Adve, Mark D. Hill, Barton P. Miller, Robert H. B. Netzer	Detecting Data Races on Weak Memory Systems.	ISCA	1991	DBLP DOI BibTeX RDF
1	Sarita V. Adve, Mark D. Hill	Weak Ordering - A New Definition.	ISCA	1990	DBLP DOI BibTeX RDF
1	Sarita V. Adve, Mark D. Hill	Implementing Sequential Consistency in Cache-Based Systems.	ICPP	1990	DBLP BibTeX RDF

Publications of "Sarita V. Adve" ( http://dblp.L3S.de/Authors/Sarita_V._Adve )