Search results for "Seok-Jun Lee"

Found 8 publication records. Showing 8 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Srinivasa R. Sridhara, Michael DiRenzo, Srinivas Lingam, Seok-Jun Lee, Ra Blazquez, Jay Maxey, Samer Ghanem, Yu-Hung Lee, Rami A. Abdallah, Prashant Singh, Manish Goel	Microwatt Embedded Processor Platform for Medical System-on-Chip Applications.	J. Solid-State Circuits	2011	DBLP DOI BibTeX RDF
1	Rajesh Narasimha, Madhukar Budagavi, Seok-Jun Lee, David D. Wentzloff	Special issue on breakthrough architectures for image and video systems.	Sig. Proc.: Image Comm.	2010	DBLP DOI BibTeX RDF
1	Rami A. Abdallah, Seok-Jun Lee, Manish Goel, Naresh R. Shanbhag	Low-power pre-decoding based viterbi decoder for tail-biting convolutional codes.	SiPS	2009	DBLP DOI BibTeX RDF
1	Seok-Jun Lee, Andrew C. Singer, Naresh R. Shanbhag	Linear turbo equalization analysis via BER transfer and EXIT charts.	IEEE Transactions on Signal Processing	2005	DBLP DOI BibTeX RDF
1	Seok-Jun Lee, Naresh R. Shanbhag, Andrew C. Singer	Area-efficient high-throughput MAP decoder architectures.	IEEE Trans. VLSI Syst.	2005	DBLP DOI BibTeX RDF
1	Seok-Jun Lee, Naresh R. Shanbhag, Andrew C. Singer	Energy Efficient VLSI Architecture for Linear Turbo Equalizer.	VLSI Signal Processing	2005	DBLP DOI BibTeX RDF	iterative equalizer, SISO, turbo, architecture, low-power, iterative decoder
1	Seok-Jun Lee, Naresh R. Shanbhag, Andrew C. Singer	Switching methods for linear turbo equalization.	ISCAS	2004	DBLP DOI BibTeX RDF
1	Seok-Jun Lee, Naresh R. Shanbhag, Andrew C. Singer	A low-power VLSI architecture for turbo decoding.	ISLPED	2003	DBLP DOI BibTeX RDF	MAP decoder, low power architecture, turbo decoding

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Publications of "Seok-Jun Lee" ( http://dblp.L3S.de/Authors/Seok-Jun_Lee )