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Publications of "Sergio Saponara" ( http://dblp.L3S.de/Authors/Sergio_Saponara )

  Author page on DBLP  Author page in RDF  Community of Sergio Saponara in ASPL-2

Publication years (Num. hits)
2000-2007 (16) 2008-2011 (19) 2012 (3)
Publication types (Num. hits)
article(22) inproceedings(16)
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Found 38 publication records. Showing 38 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Sergio Saponara Real-time and low-power processing of 3D direct/inverse discrete cosine transform for low-complexity video codec. Search on Bibsonomy J. Real-Time Image Processing The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Mauro Turturici, Sergio Saponara, Luca Fanucci, Emilio Franchi Low-power embedded system for real-time correction of fish-eye automotive cameras. Search on Bibsonomy DATE The full citation details ... 2012 DBLP  BibTeX  RDF
1M. Brandl, H. Gall, M. Wenger, V. Lorentz, M. Giegerich, Federico Baronti, Gabriele Fantechi, Luca Fanucci, Roberto Roncella, Roberto Saletti, Sergio Saponara, A. Thaler, M. Cifrain, W. Prochazka Batteries and battery management systems for electric vehicles. Search on Bibsonomy DATE The full citation details ... 2012 DBLP  BibTeX  RDF
1Sergio Saponara, Luca Fanucci, Marcello Coppola Design and coverage-driven verification of a novel network-interface IP macrocell for network-on-chip interconnects. Search on Bibsonomy Microprocessors and Microsystems - Embedded Hardware Design The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Sergio Saponara, Tommaso Baldetti, Luca Fanucci, Emilio Volpi, Francesco D'Ascoli Design of an Integrated Scanning Micromirror Driver in BCD Technology. Search on Bibsonomy Journal of Circuits, Systems, and Computers The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Sergio Saponara, Gianluca Casarosa, Peter Hambloch, Francesco Ciuchi, Luca Fanucci, Bruno Sarti Modeling, Sensitivity Analysis, and Prototyping of Low-g Acceleration Acquisition Systems for Spacecraft Testing and Environmental-Noise Measurements. Search on Bibsonomy IEEE T. Instrumentation and Measurement The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Sergio Saponara, Esa Petri, Luca Fanucci, Pierangelo Terreni Sensor Modeling, Low-Complexity Fusion Algorithms, and Mixed-Signal IC Prototyping for Gas Measures in Low-Emission Vehicles. Search on Bibsonomy IEEE T. Instrumentation and Measurement The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Alessandro Fonte, Sergio Saponara, Giancarlo Pinto, Bruno Neri Feasibility study and on-chip antenna for fully integrated μRFID tag at 60 GHz in 65 nm CMOS SOI. Search on Bibsonomy RFID-TA The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Giuseppe Pasetti, Nico Costantino, Francesco Tinfena, Riccardo Serventi, Paolo D'Abramo, Sergio Saponara, Luca Fanucci Characterization of an Intelligent Power Switch for LED driving with control of wiring parasitics effects. Search on Bibsonomy DATE The full citation details ... 2011 DBLP  BibTeX  RDF
1Sergio Saponara, Maurizio Martina, Michele Casula, Luca Fanucci, Guido Masera Motion estimation and CABAC VLSI co-processors for real-time high-quality H.264/AVC video coding. Search on Bibsonomy Microprocessors and Microsystems - Embedded Hardware Design The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Sergio Saponara, Tommaso Baldetti, Luca Fanucci A Cost-Effective 10-Bit D/A Converter for Digital-Input MOEMS Micromirror Actuation. Search on Bibsonomy VLSI Design The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Sergio Saponara, Pierluigi Nuzzo, Paolo D'Abramo, Luca Fanucci Design Methodologies and Innovative Architectures for Mixed-Signal Embedded Systems. Search on Bibsonomy EURASIP J. Emb. Sys. The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Sergio Saponara, Pierangelo Terreni Mixed-Signal Architectures for High-Efficiency and Low-Distortion Digital Audio Processing and Power Amplification. Search on Bibsonomy EURASIP J. Emb. Sys. The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Stefano Marsi, Sergio Saponara Integrated video motion estimator with Retinex-like pre-processing for robust motion analysis in automotive scenarios: algorithmic and real-time architecture design. Search on Bibsonomy J. Real-Time Image Processing The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Sergio Saponara, Nicola E. L'Insalata, Luca Fanucci Low-complexity FFT/IFFT IP hardware macrocells for OFDM and MIMO-OFDM CMOS transceivers. Search on Bibsonomy Microprocessors and Microsystems - Embedded Hardware Design The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Sergio Saponara, Pierluigi Nuzzo, Claudio Nani, Geert Van der Plas, Luca Fanucci Architectural Exploration and Design of Time-Interleaved SAR Arrays for Low-Power and High Speed A/D Converters. Search on Bibsonomy IEICE Transactions The full citation details ... 2009 DBLP  BibTeX  RDF
1Nicola E. L'Insalata, Sergio Saponara, Luca Fanucci, Pierangelo Terreni Automatic Synthesis of Cost Effective FFT/IFFT Cores for VLSI OFDM Systems. Search on Bibsonomy IEICE Transactions The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Sergio Saponara, Michele Casula, Luca Fanucci ASIP-based reconfigurable architectures for power-efficient and real-time image/video processing. Search on Bibsonomy J. Real-Time Image Processing The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Francesco Vitullo, Nicola E. L'Insalata, Esa Petri, Sergio Saponara, Luca Fanucci, Michele Casula, Riccardo Locatelli, Marcello Coppola Low-Complexity Link Microarchitecture for Mesochronous Communication in Networks-on-Chip. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Sergio Saponara, Nicola E. L'Insalata, Tony Bacchillone, Esa Petri, Iacopo Del Corona, Luca Fanucci Hardware/Software FPGA-based Network Emulator for High-speed On-board Communications. Search on Bibsonomy DSD The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Sergio Saponara, Francesco Vitullo, Riccardo Locatelli, Philippe Teninge, Marcello Coppola, Luca Fanucci LIME: A Low-latency and Low-complexity On-chip Mesochronous Link with Integrated Flow Control. Search on Bibsonomy DSD The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Pierluigi Nuzzo, Claudio Nani, Sergio Saponara, Luca Fanucci, Geert Van der Plas Mixed-Signal Design Space Exploration of Time-Interleaved A/D Converters for Ultra-Wide Band Applications. Search on Bibsonomy DATE The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Sergio Saponara, Luca Fanucci, Stefano Marsi, Giovanni Ramponi Algorithmic and architectural design for real-time and power-efficient Retinex image/video processing. Search on Bibsonomy J. Real-Time Image Processing The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Nicola E. L'Insalata, Sergio Saponara, Luca Fanucci, Pierangelo Terreni Automatic Generation of Low-Complexity FFT/IFFT Cores for Multi-Band OFDM Systems. Search on Bibsonomy DSD The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Sergio Saponara, Esa Petri, Marco Tonarelli, Iacopo Del Corona, Luca Fanucci FPGA-based networking systems for high data-rate and reliable in-vehicle communications. Search on Bibsonomy DATE The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Sergio Saponara, Pierangelo Terreni Mixed-signal design of a digital input power amplifier for automotive audio applications. Search on Bibsonomy DATE Designers' Forum The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Luca Fanucci, Michele Cassiano, Sergio Saponara, David Kammler, Ernst Martin Witte, Oliver Schliebusch, Gerd Ascheid, Rainer Leupers, Heinrich Meyr ASIP design and synthesis for non linear filtering in image processing. Search on Bibsonomy DATE Designers' Forum The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Luca Fanucci, Sergio Saponara, Massimiliano Melani, Pierangelo Terreni Self-Adaptive Algorithmic/Architectural Design for Real-Time, Low-Power Video Systems. Search on Bibsonomy IEICE Transactions The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
1Luca Fanucci, Sergio Saponara, Alexander Morello Power Optimization of an 8051-Compliant IP Microcontroller. Search on Bibsonomy IEICE Transactions The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
1Sergio Saponara, Michele Cassiano, Stefano Marsi, Riccardo Coen, Luca Fanucci Cost-effective VLSI Design of Non Linear Image Processing Filters. Search on Bibsonomy DSD The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
1Sergio Saponara, Luca Fanucci, Pierangelo Terreni Design of a Low-Power VLSI Macrocell for Nonlinear Adaptive Video Noise Reduction. Search on Bibsonomy EURASIP J. Adv. Sig. Proc. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
1Sergio Saponara, Kristof Denolf, Gauthier Lafruit, Carolina Blanch, Jan Bormans Performance and Complexity Co-evaluation of the Advanced Video Coding Standard for Cost-Effective Multimedia Communications. Search on Bibsonomy EURASIP J. Adv. Sig. Proc. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
1Sergio Saponara, Luca Fanucci, Pierangelo Terreni Context-Aware Algorithmic/Architectural Solutions for Real-time Embedded Video Systems. Search on Bibsonomy WISES The full citation details ... 2004 DBLP  BibTeX  RDF
1Sergio Saponara, Luca Fanucci VLSI design investigation for low-cost, low-power FFT/IFFT processing in advanced VDSL transceivers. Search on Bibsonomy Microelectronics Journal The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
1Sergio Saponara, Luca Fanucci, L. Serafini Low-Power FFT/IFFT VLSI Macro Cell for Scalable Broadband VDSL Modem. Search on Bibsonomy IWSOC The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
1Luca Fanucci, Sergio Saponara, Lorenzo Bertini A parametric VLSI architecture for video motion estimation. Search on Bibsonomy Integration The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
1Luca Fanucci, Lorenzo Bertini, Sergio Saponara Programmable and Low Power VLSI Architecture for Full Search Motion Estimation in Multimedia Communications. Search on Bibsonomy IEEE International Conference on Multimedia and Expo (III) The full citation details ... 2000 DBLP  BibTeX  RDF
1Luca Fanucci, Sergio Saponara, Andrea Cenciotti IP Reuse VLSI Architecture for Low Complexity Fast Motion Estimation in Multimedia Applications. Search on Bibsonomy EUROMICRO The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
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