|
|
|
|
Venues (Conferences, Journals, ...)
|
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 11 occurrences of 11 keywords
|
|
|
|
|
Results
Found 8 publication records. Showing 8 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Edson Borin, Youfeng Wu, Cheng Wang, Wei Liu, Mauricio Breternitz Jr., Shiliang Hu, Esfir Natanzon, Shai Rotem, Roni Rosner |
TAO: two-level atomicity for dynamic binary optimizations.  |
CGO  |
2010 |
DBLP DOI BibTeX RDF |
atomic execution, dynamic binary optimization, large region optimization, hardware/software co-design |
| 1 | Ken S. Stevens, Ran Ginosar, Shai Rotem |
Relative timing [asynchronous design]. |
IEEE Trans. VLSI Syst. |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Sumit Gupta, Nick Savoiu, Nikil D. Dutt, Rajesh K. Gupta, Alexandru Nicolau, Timothy Kam, Michael Kishinevsky, Shai Rotem |
Coordinated transformations for high-level synthesis of high performance microprocessor blocks. |
DAC |
2002 |
DBLP DOI BibTeX RDF |
high-level synthesis, microprocessor design |
| 1 | Marly Roncken, Ken S. Stevens, Rajesh Pendurkar, Shai Rotem, Parimal Pal Chaudhuri |
CA-BIST for Asynchronous Circuits: A Case Study on the RAPPID Asynchronous Instruction Length Decoder. |
ASYNC |
2000 |
DBLP DOI BibTeX RDF |
pulse logic, switch-level fault simulation, Cellular Automata, BIST, asynchronous circuits, testability, stuck-at faults, domino logic, self-timed circuits, dynamic circuits |
| 1 | Ken S. Stevens, Shai Rotem, Ran Ginosar |
Relative Timing. |
ASYNC |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Shai Rotem, Ken S. Stevens, Charles Dike, Marly Roncken, Boris Agapiev, Ran Ginosar, Rakefet Kol, Peter A. Beerel, Chris J. Myers, Kenneth Y. Yun |
RAPPID: An Asynchronous Instruction Length Decoder. |
ASYNC |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Ken S. Stevens, Shai Rotem, Steven M. Burns, Jordi Cortadella, Ran Ginosar, Michael Kishinevsky, Marly Roncken |
CAD Directions for High Performance Asynchronous Circuits. |
DAC |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Wei-Chun Chou, Peter A. Beerel, Ran Ginosar, Rakefet Kol, Chris J. Myers, Shai Rotem, Ken S. Stevens, Kenneth Y. Yun |
Average-Case Optimized Technology Mapping of One-Hot Domino CircuitsAverage-Case Optimized Transistor-Level Technology Mapping of Extended Burst-Mode Circuits. |
ASYNC |
1998 |
DBLP DOI BibTeX RDF |
|
Displaying result #1 - #8 of 8 (100 per page; Change: )
|
|
![[Valid RSS]](Pics/valid-rss.png "Validate my RSS feed")