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Found 2 publication records. Showing 2 according to the selection in the facets
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| 1 | Rahul Rithe, Sharon Chou, Jie Gu, Alice Wang, Satyendra Datla, Gordon Gammie, Dennis Buss, Anantha Chandrakasan |
The Effect of Random Dopant Fluctuations on Logic Timing at Low Voltage.  |
IEEE Trans. VLSI Syst.  |
2012 |
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| 1 | Rahul Rithe, Sharon Chou, Jie Gu, Alice Wang, Satyendra Datla, Gordon Gammie, Dennis Buss, Anantha Chandrakasan |
Cell Library Characterization at Low Voltage Using Non-linear Operating Point Analysis of Local Variations.  |
VLSI Design  |
2011 |
DBLP DOI BibTeX RDF |
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