|
|
|
|
Venues (Conferences, Journals, ...)
|
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
No Growbag Graphs found.
|
|
|
|
|
Results
Found 11 publication records. Showing 11 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Jiun-Ping Wang, Shiann-Rong Kuang, Shish-Chang Liang |
High-Accuracy Fixed-Width Modified Booth Multipliers for Lossy Applications.  |
IEEE Trans. VLSI Syst.  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Shiann-Rong Kuang, Jiun-Ping Wang, Hong-Yi Huang |
Variable-Latency Floating-Point Multipliers for Low-Power Applications. |
IEEE Trans. VLSI Syst. |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Shiann-Rong Kuang, Jiun-Ping Wang |
Design of Power-Efficient Configurable Booth Multiplier. |
IEEE Trans. on Circuits and Systems |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Shiann-Rong Kuang, Jiun-Ping Wang, Cang-Yuan Guo |
Modified Booth Multipliers With a Regular Partial Product Array. |
IEEE Trans. on Circuits and Systems |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Shiann-Rong Kuang, Jiun-Ping Wang |
Design of power-efficient pipelined truncated multipliers with various output precision. |
IET Computers & Digital Techniques |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Jiun-Ping Wang, Shiann-Rong Kuang |
Area-Efficient Signed Fixed-Width Multipliers with Low-Error Compensation Circuit. |
SiPS |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Shiann-Rong Kuang, Chin-Yang Chen, Ren-Zheng Liao |
Partitioning and Pipelined Scheduling of Embedded System Using Integer Linear Programming. |
ICPADS |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Jer-Min Jou, Shiann-Rong Kuang, Yeu-Horng Shiau, Ren-Der Chen |
Design of a dynamic pipelined architecture for fuzzy color correction. |
IEEE Trans. VLSI Syst. |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Jer-Min Jou, Shiann-Rong Kuang, Yeu-Horng Shiau |
A New Pipelined Architecture for Fuzzy Color Correction. |
ASP-DAC |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Jer-Min Jou, Ren-Der Chen, Shiann-Rong Kuang |
Multiport Memory Based Data Path Allocation Focusing on Interconnection Optimization. |
ISCAS |
1994 |
DBLP BibTeX RDF |
|
| 1 | Jer-Min Jou, Shiann-Rong Kuang |
Library-Adaptively Integrated Data Path Synthesis for DSP Systems. |
ICCD |
1993 |
DBLP BibTeX RDF |
|
Displaying result #1 - #11 of 11 (100 per page; Change: )
|
|
![[Valid RSS]](Pics/valid-rss.png "Validate my RSS feed")