| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Gal Motika, Shlomo Weiss |
Virtio network paravirtualization driver: Implementation and performance of a de-facto standard.  |
Computer Standards & Interfaces  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Gadi Oxman, Shlomo Weiss, Yitzhak (Tsahi) Birk |
Streamlined Network-on-Chip for Multicore Embedded Architectures. |
ARCS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Nadav Levison, Shlomo Weiss |
Branch target buffer design for embedded processors. |
Microprocessors and Microsystems - Embedded Hardware Design |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Roger Kahn, Shlomo Weiss |
Reducing leakage power with BTB access prediction. |
Integration |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Nadav Levison, Shlomo Weiss |
Low power branch prediction for embedded application processors. |
ISLPED |
2010 |
DBLP DOI BibTeX RDF |
ARM cortex, BTB, mobile, embedded, power, battery |
| 1 | Ron Gabor, Avi Mendelson, Shlomo Weiss |
Service level agreement for multithreaded processors. |
TACO |
2009 |
DBLP DOI BibTeX RDF |
performance, fairness, throughput, power, Service level agreement |
| 1 | Amit Golander, Shlomo Weiss |
Checkpoint allocation and release. |
TACO |
2009 |
DBLP DOI BibTeX RDF |
early register release, misprediction, Checkpoint, leakage, out-of-order execution, rollback |
| 1 | Amit Golander, Shlomo Weiss |
Reexecution and Selective Reuse in Checkpoint Processors. |
T. HiPEAC |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Amit Golander, Shlomo Weiss, Ronny Ronen |
Synchronizing Redundant Cores in a Dynamic DMR Multicore Architecture. |
IEEE Trans. on Circuits and Systems |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Roger Kahn, Shlomo Weiss |
Thrifty BTB: A comprehensive solution for dynamic power reduction in branch target buffers. |
Microprocessors and Microsystems - Embedded Hardware Design |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Amit Golander, Shlomo Weiss |
Hiding the misprediction penalty of a resource-efficient high-performance processor. |
TACO |
2008 |
DBLP DOI BibTeX RDF |
misprediction, Checkpoints, out-of-order execution, scalable architecture, rollback |
| 1 | Amit Golander, Shlomo Weiss, Ronny Ronen |
DDMR: Dynamic and Scalable Dual Modular Redundancy with Short Validation Intervals. |
Computer Architecture Letters |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Ron Gabor, Shlomo Weiss, Avi Mendelson |
Fairness enforcement in switch on event multithreading. |
TACO |
2007 |
DBLP DOI BibTeX RDF |
SOE, Switch on Event multithreading, coarse-grained multithreading, weighted speedup, performance, fairness, throughput, multithreading |
| 1 | Yehuda Sadeh Weinraub, Shlomo Weiss |
Power-aware out-of-order issue logic in high-performance microprocessors. |
Microprocessors and Microsystems |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Ron Gabor, Shlomo Weiss, Avi Mendelson |
Fairness and Throughput in Switch on Event Multithreading. |
MICRO |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Tomer Karin, Shlomo Weiss |
Programming Windows NT device drivers to operate non-interrupting embedded devices. |
Microprocessors and Microsystems |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Doron Nakar, Shlomo Weiss |
Selective main memory compression by identifying program phase changes. |
WMPI |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Shlomo Weiss, Shay Beren |
Class-Based Decompressor Design for Compressed Instruction Memory in Embedded Processors. |
IEEE Trans. Computers |
2003 |
DBLP DOI BibTeX RDF |
decompressor architecture, Embedded processors, code compression |
| 1 | Shlomo Weiss, Roman Tsikel |
Approximate prefix coding for system-on-a-chip programs. |
Journal of Systems Architecture |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Avishay Orpaz, Shlomo Weiss |
Pattern Matching by means of Multi-Resolution Compression. |
DCC |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Ehud Finkelstein, Shlomo Weiss |
A PCI bus simulation framework and some simulation results on PCI standard 2.1 latency limitations. |
Journal of Systems Architecture |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Avishay Orpaz, Shlomo Weiss |
A study of CodePack: optimizing embedded code space. |
CODES |
2002 |
DBLP DOI BibTeX RDF |
codepack, optimization, embedded systems, embedded software, code compression |
| 1 | Shlomo Weiss, Shay Beren |
HW/SW partitioning of an embedded instruction memory decompressor. |
CODES |
2001 |
DBLP DOI BibTeX RDF |
compressed instruction memory, embedded systems |
| 1 | Ehud Finkelstein, Shlomo Weiss |
Microprocessor system buses: A case study. |
Journal of Systems Architecture |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Shlomo Weiss, Ehud Finkelstein |
Extending PCI Performance Beyond the Desktop. |
IEEE Computer |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Shlomo Reches, Shlomo Weiss |
Implementation and Analysis of Path History in Dynamic Branch Prediction Schemes. |
IEEE Trans. Computers |
1998 |
DBLP DOI BibTeX RDF |
path history, Branch prediction, speculative execution, branch history |
| 1 | Eitan Federovsky, Meir Feder, Shlomo Weiss |
Branch Prediction Based on Universal Data Compression Algorithms. |
ISCA |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Shlomo Reches, Shlomo Weiss |
Implementation and Analysis of Path History in Dynamic Branch Prediction Schemes. |
International Conference on Supercomputing |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Shlomo Weiss |
Implementing Register Interlocks in Parallel-Pipeline Multiple Instruction Queue, Superscalar Processors. |
HPCA |
1995 |
DBLP DOI BibTeX RDF |
|
| 1 | James E. Smith, Shlomo Weiss |
PowerPC 601 and Alpha 21064: A Tale of Two RISCs. |
IEEE Computer |
1994 |
DBLP DOI BibTeX RDF |
|
| 1 | Ravi Ganesan, Shlomo Weiss |
Scalar Memory References in Pipelined Multiprocessors: A Performance Study. |
IEEE Trans. Software Eng. |
1992 |
DBLP DOI BibTeX RDF |
scalar memory references, pipelined multiprocessors, high memory bandwidth, memory cycle, processor cycle time, bank reservation time, bank busy time, performance evaluation, probability, Markov chain, Markov processes, parallel machines, Markov models, storage management, simulation results, pipeline processing, state space, transition probabilities, pipelined computers, memory bank |
| 1 | Shlomo Weiss |
Memory conflict resolution in vector supercomputers. |
The Journal of Supercomputing |
1992 |
DBLP DOI BibTeX RDF |
|
| 1 | Shlomo Weiss |
Multiple-Port Memory Access in Decoupled Architecture Processors. |
ICPP |
1991 |
DBLP BibTeX RDF |
|
| 1 | Shlomo Weiss, James E. Smith |
A study of scalar compilation techniques for pipelined supercomputers. |
ACM Trans. Math. Softw. |
1990 |
DBLP DOI BibTeX RDF |
|
| 1 | Shlomo Weiss |
An Aperiodic Storage Scheme to Reduce Memory Conflicts in Vector Processors. |
ISCA |
1989 |
DBLP DOI BibTeX RDF |
CRAY-1 |
| 1 | Shlomo Weiss, James E. Smith |
A Study of Scalar Compilation Techniques for Pipelined Supercomputers. |
ASPLOS |
1987 |
DBLP DOI BibTeX RDF |
|
| 1 | James E. Smith, Shlomo Weiss, Nicholas Y. Pang |
A Simulation Study of Decoupled Architecture Computers. |
IEEE Trans. Computers |
1986 |
DBLP DOI BibTeX RDF |
performance evaluation, scientific computers, supercomputers, pipelined processors, Decoupled architectures |
| 1 | Shlomo Weiss, Katie Rotzell, Tom Rhyne, Arny Goldfein |
DOSS: a storage system for design data. |
DAC |
1986 |
DBLP DOI BibTeX RDF |
|
| 1 | Shlomo Weiss, James E. Smith |
Instruction Issue Logic in Pipelined Supercomputers. |
IEEE Trans. Computers |
1984 |
DBLP DOI BibTeX RDF |
|
| 1 | Shlomo Weiss, James E. Smith |
Instruction Issue Logic for Pipelined Supercomputers. |
ISCA |
1984 |
DBLP DOI BibTeX RDF |
|
| 1 | Randy H. Katz, Shlomo Weiss |
Design transaction management. |
DAC |
1984 |
DBLP BibTeX RDF |
|
| 1 | Shlomo Weiss |
Recovery of In-Memory Data Structures for Interactive Update Applications. |
COMPCON |
1984 |
DBLP BibTeX RDF |
|
| 1 | Randy H. Katz, Shlomo Weiss |
Chip assemblers: Concepts and capabilities. |
DAC |
1983 |
DBLP BibTeX RDF |
|
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