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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 13 occurrences of 11 keywords
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Results
Found 11 publication records. Showing 11 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Chi-Neng Wen, Shu-Hsuan Chou, Chien-Chih Chen, Tien-Fu Chen |
NUDA: A Non-Uniform Debugging Architecture and Nonintrusive Race Detection for Many-Core Systems.  |
IEEE Trans. Computers  |
2012 |
DBLP DOI BibTeX RDF |
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| 1 | Shu-Hsuan Chou, Chien-Chih Chen, Chi-Neng Wen, Tien-Fu Chen, Tay-Jyi Lin |
Hierarchical circuit-switched NoC for multicore video processing. |
Microprocessors and Microsystems - Embedded Hardware Design |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Amitava Majumdar, Arani Sinha, Nehal Patel, Ramamurthy Setty, Yan Dong, Shu-Hsuan Chou |
A Novel mechanism for speed characterization during delay test. |
VTS |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Chi-Neng Wen, Shu-Hsuan Chou, Tien-Fu Chen, Tay-Jyi Lin |
RunAssert: A non-intrusive run-time assertion for parallel programs debugging. |
DATE |
2010 |
DBLP BibTeX RDF |
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| 1 | Wei-Chun Ku, Shu-Hsuan Chou, Jui-Chin Chu, Chi-Lin Liu, Tien-Fu Chen, Jiun-In Guo, Jinn-Shyan Wang |
VisoMT: A Collaborative Multithreading Multicore Processor for Multimedia Applications With a Fast Data Switching Mechanism. |
IEEE Trans. Circuits Syst. Video Techn. |
2009 |
DBLP DOI BibTeX RDF |
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| 1 | Shu-Hsuan Chou, Chi-Neng Wen, Yan-Ling Liu, Tien-Fu Chen |
VeriC: A semi-hardware description language to bridge the gap between ESL design and RTL models. |
ISQED |
2009 |
DBLP DOI BibTeX RDF |
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| 1 | Shu-Hsuan Chou, Chien-Chih Chen, Chi-Neng Wen, Yi-Chao Chan, Tien-Fu Chen, Chao-Ching Wang, Jinn-Shyan Wang |
No cache-coherence: a single-cycle ring interconnection for multi-core L1-NUCA sharing on 3D chips. |
DAC |
2009 |
DBLP DOI BibTeX RDF |
level-1 non-uniform cache architecture, ring interconnection, single-cycle transactions, multi-core, NOC, SOC, arbitration, memory structure |
| 1 | Chi-Neng Wen, Shu-Hsuan Chou, Tien-Fu Chen, Alan Peisheng Su |
NUDA: a non-uniform debugging architecture and non-intrusive race detection for many-core. |
DAC |
2009 |
DBLP DOI BibTeX RDF |
architecture, debugging, many-core, race detection |
| 1 | Chi-Neng Wen, Shu-Hsuan Chou, Tien-Fu Chen |
dIP: A Non-intrusive Debugging IP for Dynamic Data Race Detection in Many-Core. |
ISPAN |
2009 |
DBLP DOI BibTeX RDF |
Fault-Tolerance, debugging, Multi-core, Heterogeneous (hybrid) systems |
| 1 | Jui-Chin Chu, Wei-Chun Ku, Shu-Hsuan Chou, Tien-Fu Chen, Jiun-In Guo |
An Embedded Coherent-Multithreading Multimedia Processor and Its Programming Model. |
DAC |
2007 |
DBLP DOI BibTeX RDF |
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| 1 | Wei-Chun Ku, Shu-Hsuan Chou, Jui-Chin Chu, Chih-Heng Kang, Tien-Fu Chen, Jiun-In Guo |
Collaborative Multithreading: An Open Scalable Processor Architecture for Embedded Multimedia Applications. |
ICME |
2006 |
DBLP DOI BibTeX RDF |
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Displaying result #1 - #11 of 11 (100 per page; Change: )
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