Search results for "Shuichi Sakai"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Ryota Shioya, Daewung Kim, Kazuo Horio, Masahiro Goshima, Shuichi Sakai	Low-Overhead Architecture for Security Tag.	IEICE Transactions	2011	DBLP BibTeX RDF
1	Ryota Shioya, Kazuo Horio, Masahiro Goshima, Shuichi Sakai	Register Cache System Not for Latency Reduction Purpose.	MICRO	2010	DBLP DOI BibTeX RDF
1	Ryota Shioya, Daewung Kim, Kazuo Horio, Masahiro Goshima, Shuichi Sakai	Low-Overhead Architecture for Security Tag.	PRDC	2009	DBLP DOI BibTeX RDF
1	Kunbo Li, Ryota Shioya, Masahiro Goshima, Shuichi Sakai	String-Wise Information Flow Tracking against Script Injection Attacks.	PRDC	2009	DBLP DOI BibTeX RDF
1	Shuichi Sakai, Hidetoshi Onodera, Hiroto Yasuura, James C. Hoe	Dependable VLSI: device, design and architecture: how should they cooperate?	ASP-DAC	2009	DBLP DOI BibTeX RDF
1	Shuichi Sakai, Masahiro Goshima, Hidetsugu Irie	Ultra Dependable Processor.	IEICE Transactions	2008	DBLP DOI BibTeX RDF
1	Hidetsugu Irie, Ken Sugimoto, Masahiro Goshima, Shuichi Sakai	Preventing timing errors on register writes: mechanisms of detections and recoveries.	SIGARCH Computer Architecture News	2007	DBLP DOI BibTeX RDF
1	Tomoyoshi Kinoshita, Ibuki Handa, Makoto Muto, Shuichi Sakai, Hidehiko Tanaka	Musical part separation based on perceptual hierarchy.	Systems and Computers in Japan	2007	DBLP DOI BibTeX RDF
1	Luong Dinh Hung, Hidetsugu Irie, Masahiro Goshima, Shuichi Sakai	Utilization of SECDED for soft error and variation-induced defect tolerance in caches.	DATE	2007	DBLP DOI BibTeX RDF
1	Luong Dinh Hung, Masahiro Goshima, Shuichi Sakai	SEVA: A Soft-Error- and Variation-Aware Cache Architecture.	PRDC	2006	DBLP DOI BibTeX RDF
1	Satoshi Katsunuma, Hiroyuki Kurita, Ryota Shioya, Kazuto Shimizu, Hidetsugu Irie, Masahiro Goshima, Shuichi Sakai	Base Address Recognition with Data Flow Tracking for Injection Attack Detection.	PRDC	2006	DBLP DOI BibTeX RDF	injection attack, base address, data flow tracking, security, vulnerability
1	Koichi Miura, Motomu Takano, Reiko Hamada, Ichiro Ide, Shuichi Sakai, Hidehiko Tanaka	Associating semantically structured cooking videos with their preparation steps.	Systems and Computers in Japan	2005	DBLP DOI BibTeX RDF
1	Luong Dinh Hung, Shuichi Sakai	Dynamic Estimation of Task Level Parallelism with Operating System Support.	ISPAN	2005	DBLP DOI BibTeX RDF
1	Reiko Hamada, Jun Okabe, Ichiro Ide, Shin'ichi Satoh, Shuichi Sakai, Hidehiko Tanaka	Cooking navi: assistant for daily cooking in kitchen.	ACM Multimedia	2005	DBLP DOI BibTeX RDF	assistance to human activities, cooking
1	Luong Dinh Hung, Masahiro Goshima, Shuichi Sakai	Mitigating Soft Errors in Highly Associative Cache with CAM-based Tag.	ICCD	2005	DBLP DOI BibTeX RDF
1	Reiko Hamada, Koichi Miura, Ichiro Ide, Shin'ichi Satoh, Shuichi Sakai, Hidehiko Tanaka	Multimedia Integration for Cooking Video Indexing.	PCM	2004	DBLP DOI BibTeX RDF	Cooking Videos, Association of Video and Text, Indexing
1	Ichiro Ide, Reiko Hamada, Shuichi Sakai, Hidehiko Tanaka	Compilation of dictionaries for semantic attribute analysis of television news captions.	Systems and Computers in Japan	2003	DBLP DOI BibTeX RDF
1	Shuichi Sakai, Mitsunori Togasaki, Koichi Yamazaki	A note on greedy algorithms for the maximum weighted independent set problem.	Discrete Applied Mathematics	2003	DBLP DOI BibTeX RDF
1	Yoshimitsu Yanagawa, Luong Dinh Hung, Chitaka Iwama, Niko Demus Barli, Shuichi Sakai, Hidehiko Tanaka	Complexity Analysis of a Cache Controller for Speculative Multithreading Chip Multiprocessors.	HiPC	2003	DBLP DOI BibTeX RDF
1	Hideyuki Miura, Luong Dinh Hung, Chitaka Iwama, Daisuke Tashiro, Niko Demus Barli, Shuichi Sakai, Hidehiko Tanaka	Compiler-Assisted Thread Level Control Speculation.	Euro-Par	2003	DBLP DOI BibTeX RDF
1	Koichi Miura, Reiko Hamada, Ichiro Ide, Shuichi Sakai, Hidehiko Tanaka	Associating Cooking Video Segments with Preparation Steps.	CIVR	2003	DBLP DOI BibTeX RDF
1	Shuichi Sakai	CMP on SoC: Architect's View.	ISSS	2002	DBLP DOI BibTeX RDF	CMP (Chip Multiprocessor), I/O centric, SoC (System on Chip), parallel processing, dependability
1	Okihisa Utsumi, Koichi Miura, Ichiro Ide, Shuichi Sakai, Hidehiko Tanaka	An object detection method for describing soccer games from video.	ICME	2002	DBLP DOI BibTeX RDF
1	Chitaka Iwama, Niko Demus Barli, Shuichi Sakai, Hidehiko Tanaka	Improving Conditional Branch Prediction on Speculative Multithreading Architectures.	Euro-Par	2001	DBLP DOI BibTeX RDF
1	Reiko Hamada, Ichiro Ide, Shuichi Sakai, Hidehiko Tanaka	Structural analysis of cooking preparation steps in Japanese.	IRAL	2000	DBLP DOI BibTeX RDF	cookbooks, domain specific dictionary, preparation steps, structural analysis
1	Ichiro Ide, Reiko Hamada, Shuichi Sakai, Hidehiko Tanaka	Scene identification in news video by character region segmentation.	ACM Multimedia Workshops	2000	DBLP DOI BibTeX RDF
1	Reiko Hamada, Ichiro Ide, Shuichi Sakai	Associating cooking video with related textbook.	ACM Multimedia Workshops	2000	DBLP DOI BibTeX RDF
1	Ichiro Ide, Reiko Hamada, Shuichi Sakai, Hidehiko Tanaka	Relating Graphical Features with Concept Classes for Automatic News Video Indexing.	Intelligent Information Integration	1999	DBLP BibTeX RDF
1	Masaaki Honda, Takeo Igarashi, Hidehiko Tanaka, Shuichi Sakai	Integrated Manipulation: Context-Aware Manipulation of 2D Diagrams.	ACM Symposium on User Interface Software and Technology	1999	DBLP DOI BibTeX RDF	drawing editors, CAD, interaction techniques, direct manipulation
1	Reiko Hamada, Ichiro Ide, Shuichi Sakai, Hidehiko Tanaka	Associating video with related documents.	ACM Multimedia	1999	DBLP DOI BibTeX RDF
1	Antonio Magnaghi, Shuichi Sakai, Hidehiko Tanaka	Inter-procedural Analysis for Parallelization of Java Programs.	ACPC	1999	DBLP DOI BibTeX RDF
1	Yuetsu Kodama, Hirofumi Sakane, Hanpei Koike, Mitsuhisa Sato, Shuichi Sakai, Yoshinori Yamaguchi	Parallel Execution of Radix Sort Program Using Fine-Grain Communication.	IEEE PACT	1997	DBLP DOI BibTeX RDF	fine-grain communication, parallel radix sort, performance scalability, EM-X
1	Mitsuhisa Sato, Yuetsu Kodama, Hirofumi Sakane, Hayato Yamana, Shuichi Sakai, Yoshinori Yamaguchi	Experience with Fine-Grain Communication in EM-X Multiprocessor for Parallel Sparse Matrix Computation. (PDF / PS)	IPPS	1997	DBLP DOI BibTeX RDF
1	Andrew Sohn, Yuetsu Kodama, Jui Ku, Mitsuhisa Sato, Hirofumi Sakane, Hayato Yamana, Shuichi Sakai, Yoshinori Yamaguchi	Fine-Grain Multithreading with the EM-X Multiprocessor.	SPAA	1997	DBLP DOI BibTeX RDF
1	Shuichi Sakai, Yuetsu Kodama, Mitsuhisa Sato, Andrew Shaw, Hiroshi Matsuoka, Hideo Hirono, Kazuaki Okamoto, Takashi Yokota	Reduced Interprocessor-Communication Architecture and its Implementation on EM-4.	Parallel Computing	1995	DBLP DOI BibTeX RDF
1	Yuetsu Kodama, Hirohumi Sakane, Mitsuhisa Sato, Hayato Yamana, Shuichi Sakai, Yoshinori Yamaguchi	The EM-X Parallel Computer: Architecture and Basic Performance.	ISCA	1995	DBLP DOI BibTeX RDF
1	Hayato Yamana, Mitsuhisa Sato, Yuetsu Kodama, Hirofumi Sakane, Shuichi Sakai, Yoshinori Yamaguchi	A Macrotask-level Unlimited Speculative Execution on Multiprocessors.	International Conference on Supercomputing	1995	DBLP DOI BibTeX RDF	FORTRAN
1	Atsushi Hori, Takashi Yokota, Yutaka Ishikawa, Shuichi Sakai, Hiroki Konaka, Munenori Maeda, Takashi Tomokiyo, Jörg Nolte, Hiroshi Matsuoka, Kazuaki Okamoto, Hideo Hirono	Time Space Sharing Scheduling and Architectural Support.	JSSPP	1995	DBLP DOI BibTeX RDF
1	Shuichi Sakai	Overview of RWC Massively Parallel Computer Project.	HPDC	1994	DBLP BibTeX RDF
1	Andrew Sohn, Mitsuhisa Sato, Shuichi Sakai, Yuetsu Kodama, Yoshinori Yamaguchi	Nonnumeric search results on the EM-4 distributed-memory multiprocessor.	SC	1994	DBLP BibTeX RDF
1	Mitsuhisa Sato, Yuetsu Kodama, Yoshinori Yamaguchi, Shuichi Sakai	Experience with Executing Shared Memory Programs using Fine-Grain Communication and Multithreading in EM-4.	IPPS	1994	DBLP BibTeX RDF
1	Mitsuhisa Sato, Yuetsu Kodama, Hirofumi Sakane, Yoshinori Yamaguchi, Shuichi Sakai	Programming with Distributed Data Structure for EM-X Multiprocessor.	Theory and Practice of Parallel Programming	1994	DBLP DOI BibTeX RDF
1	Mitsuhisa Sato, Yuetsu Kodama, Shuichi Sakai, Yoshinori Yamaguchi	EM-C: Programming with Explicit Parallelism and Locality for EM-4 Multiprocessor.	IFIP PACT	1994	DBLP BibTeX RDF
1	Shuichi Sakai, Yuetsu Kodama, Yoshinori Yamaguchi	Design and Implementation of a Circular Omega Network in the EM-4.	Parallel Computing	1993	DBLP DOI BibTeX RDF
1	Yuetsu Kodama, Yasuhito Koumura, Mitsuhisa Sato, Hirohumi Sakane, Shuichi Sakai, Yoshinori Yamaguchi	EMC-Y: Parallel Processing Element Optimizing Communication and Computation.	International Conference on Supercomputing	1993	DBLP DOI BibTeX RDF
1	Shuichi Sakai, Kazuaki Okamoto, Hiroshi Matsuoka, Hideo Hirono, Yuetsu Kodama, Mitsuhisa Sato	Super-Threading: Architectural and Software Mechanisms for Optimizing Parallel Computation.	International Conference on Supercomputing	1993	DBLP DOI BibTeX RDF
1	Shuichi Sakai, Hiroshi Matsuoka, Yuetsu Kodama, Mitsuhisa Sato, Andrew Shaw, Hideo Hirono, Kazuaki Okamoto, Takashi Yokota	RICA: Reduced Interprocessor-Communication Architecture - Concept and Mechanisms.	SPDP	1993	DBLP BibTeX RDF
1	Kazuaki Okamoto, Yuetsu Kodama, Shuichi Sakai, Yoshinori Yamaguchi	Methodologies in development and testing of the dataflow machine EM-4.	Parallel Computing	1992	DBLP DOI BibTeX RDF
1	Mitsuhisa Sato, Yuetsu Kodama, Shuichi Sakai, Yoshinori Yamaguchi, Yasuhito Koumura	Thread-based Programming for the EM-4 Hybrid Dataflow Machine.	ISCA	1992	DBLP DOI BibTeX RDF
1	Yuetsu Kodama, Shuichi Sakai, Yoshinori Yamaguchi	Evaluation of the EM-4 Highly Parallel Computer using a Game Tree Searching Problem.	FGCS	1992	DBLP BibTeX RDF
1	Kenji Toda, Kenji Nishida, Shuichi Sakai, Toshio Shimada	A priority forwarding scheme for real-time multistage interconnection networks.	IEEE Real-Time Systems Symposium	1992	DBLP DOI BibTeX RDF
1	Yuetsu Kodama, Shuichi Sakai, Yoshinori Yamaguchi	Load balancing by function distribution on the EM-4 prototype.	SC	1991	DBLP DOI BibTeX RDF
1	Shuichi Sakai, Yuetsu Kodama, Yoshinori Yamaguchi	Prototype Implementation of a Highly Parallel Dataflow Machine EM-4.	IPPS	1991	DBLP BibTeX RDF
1	Kenji Toda, Kenji Nishida, Yoshinobu Uchibori, Shuichi Sakai, Toshio Shimada	Parallel Multi-Context Architecture with High-Speed Synchronization Mechanism.	IPPS	1991	DBLP BibTeX RDF
1	Shuichi Sakai, Yuetsu Kodama, Yoshinori Yamaguchi	Design and Implementation of a Versatile Interconnection Network in the EM-4.	ICPP	1991	DBLP BibTeX RDF
1	Toshitsugu Yuba, Toshio Shimada, Yoshinori Yamaguchi, Kei Hiraki, Shuichi Sakai	Dataflow computer development in Japan.	ICS	1990	DBLP DOI BibTeX RDF
1	Shuichi Sakai, Yoshinori Yamaguchi, Kei Hiraki, Yuetsu Kodama, Toshitsugu Yuba	An Architecture of a Dataflow Single Chip Processor.	ISCA	1989	DBLP DOI BibTeX RDF	RISC
1	Yoshinori Yamaguchi, Shuichi Sakai, Kei Hiraki, Yuetsu Kodama	An Architectural Disgn of a Highly Parallel Dataflow Machine.	IFIP Congress	1989	DBLP BibTeX RDF

Publications of "Shuichi Sakai" ( http://dblp.L3S.de/Authors/Shuichi_Sakai )