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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 4 occurrences of 4 keywords
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Found 24 publication records. Showing 24 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Debjit Pal, Pallab Dasgupta, Siddhartha Mukhopadhyay |
A Library for Passive Online Verification of Analog and Mixed-Signal Circuits.  |
VLSI Design  |
2012 |
DBLP DOI BibTeX RDF |
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| 1 | Antara Ain, Debjit Pal, Pallab Dasgupta, Siddhartha Mukhopadhyay, Rajdeep Mukhopadhyay, John Gough |
Chassis: A Platform for Verifying PMU Integration Using Autogenerated Behavioral Models. |
ACM Trans. Design Autom. Electr. Syst. |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Subhankar Mukherjee, Pallab Dasgupta, Siddhartha Mukhopadhyay |
Auxiliary Specifications for Context-Sensitive Monitoring of AMS Assertions. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Arnab Khawas, Amitava Banerjee, Siddhartha Mukhopadhyay |
A Response Surface Method for Design Space Exploration and Optimization of Analog Circuits. |
ISVLSI |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Arnab Khawas, Siddhartha Mukhopadhyay |
A Design of Experiment Based Approach to Variance Optimal Design of CMOS OpAmp. |
ISVLSI |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Santosh Biswas, Dipankar Sarkar, Siddhartha Mukhopadhyay, Amit Patra |
Fairness of Transitions in Diagnosability of Discrete Event Systems. |
Discrete Event Dynamic Systems |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Santosh Biswas, Dipankar Sarkar, Siddhartha Mukhopadhyay |
Diagnosability of delay-deadline failures in fair real time discrete event models. |
Int. J. Systems Science |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Rajdeep Mukhopadhyay, Anvesh Komuravelli, Pallab Dasgupta, S. K. Panda, Siddhartha Mukhopadhyay |
A static verification approach for architectural integration of mixed-signal integrated circuits. |
Integration |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Rahul Bhattachrya, Santosh Biswas, Siddhartha Mukhopadhyay |
FPGA based chip emulation system for test development and verification of analog and mixed signal circuits (abstract only). |
FPGA |
2010 |
DBLP DOI BibTeX RDF |
ams testing, concurrent test development, behavioral modeling |
| 1 | Srikanth Pam, Anirban Krishna Bhattacharya, Siddhartha Mukhopadhyay |
An Efficient Method for Bottom-Up Extraction of Analog Behavioral Model Parameters. |
VLSI Design |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Somnath Sengupta, Soumen De, Anirban Krishna Bhattacharya, Siddhartha Mukhopadhyay, Alok Kanti Deb |
Fault detection of Air Intake Systems of SI gasoline engines using mean value and within cycle models. |
CASE |
2009 |
DBLP DOI BibTeX RDF |
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| 1 | Jyotirmoy Ghosh, Siddhartha Mukhopadhyay, Amit Patra, Barry Culpepper, Tawen Mei |
A New Approach for Estimation of RDS(on) of Power Arrays: Extensions and Experimental Results. |
ISCAS |
2009 |
DBLP DOI BibTeX RDF |
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| 1 | Santosh Biswas, Siddhartha Mukhopadhyay, Amit Patra, Dipankar Sarkar |
Unified Technique for on-Line Testing of Digital Circuits: Delay and Stuck-at Fault Models. |
Journal of Circuits, Systems, and Computers |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Jyotirmoy Ghosh, Siddhartha Mukhopadhyay, Amit Patra, Barry Culpepper, Tawen Mei |
A New Approach for Estimation of On-Resistance and Current Distribution in Power Array Layouts. |
VLSI Design |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Amitava Banerjee, Subho Chatterjee, Amit Patra, Siddhartha Mukhopadhyay |
An efficient approach to model distortion in weakly nonlinear Gm - C filters. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Prodip Bhowal, Dipankar Sarkar, Siddhartha Mukhopadhyay, Anupam Basu |
Fault diagnosis in discrete time hybrid systems - A case study. |
Inf. Sci. |
2007 |
DBLP DOI BibTeX RDF |
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| 1 | Santosh Biswas, Siddhartha Mukhopadhyay, P. Patra, Dipankar Sarkar |
Concurrent Testing of Digital Circuits for Advanced Fault Models. |
DDECS |
2006 |
DBLP BibTeX RDF |
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| 1 | Santosh Biswas, Siddhartha Mukhopadhyay, Amit Patra |
A Formal Approach to On-Line Monitoring of Digital VLSI Circuits: Theory, Design and Implementation. |
J. Electronic Testing |
2005 |
DBLP DOI BibTeX RDF |
detection latency, discrete event systems, ordered binary decision diagrams, fault detection and diagnosis |
| 1 | Santosh Biswas, P. Srikanth, R. Jha, Siddhartha Mukhopadhyay, Amit Patra, Dipankar Sarkar |
On-Line Testing of Digital Circuits for n-Detect and Bridging Fault Models. |
Asian Test Symposium |
2005 |
DBLP DOI BibTeX RDF |
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| 1 | Abhijit Chatterjee, Ali Keshavarzi, Amit Patra, Siddhartha Mukhopadhyay |
Test Methodologies in the Deep Submicron Era -- Analog, Mixed-Signal, and RF. (PDF / PS) |
VLSI Design |
2005 |
DBLP DOI BibTeX RDF |
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| 1 | Santosh Biswas, Siddhartha Mukhopadhyay, Amit Patra |
A discrete event systems approach to online testing of digital VLSI circuits. |
SMC |
2004 |
DBLP DOI BibTeX RDF |
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| 1 | Santosh Biswas, Siddhartha Mukhopadhyay, Amit Patra |
A BIST Approach to On-Line Monitoring of Digital VLSI Circuits: A CAD Tool. |
Asian Test Symposium |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Santosh Biswas, Siddhartha Mukhopadhyay, Amit Patra |
Optimization of the Theory of FDD of DES for Alleviation of the State Explosion Problem and Development of CAD Tools for On-line Testing of Digital VLSI Circuits. |
IOLTS |
2004 |
DBLP DOI BibTeX RDF |
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| 1 | Supratik Bose, Siddhartha Mukhopadhyay |
An extended finitely recursive process model for discrete event systems. |
IEEE Transactions on Systems, Man, and Cybernetics |
1995 |
DBLP DOI BibTeX RDF |
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