Search results for "Sign extension"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
3	Robert T. Grisamore, Earl E. Swartzlander Jr.	Negative Save Sign Extension for Multi-term Adders and Multipliers.	Signal Processing Systems	2008	DBLP DOI BibTeX RDF	adder trees, multi-term adders, two’s complement arithmetic, sign extension, multipliers
2	Motohiro Kawahito, Hideaki Komatsu, Toshio Nakatani	Effective sign extension elimination for java.	ACM Trans. Program. Lang. Syst.	2006	DBLP DOI BibTeX RDF	Sign extension, Java, JIT compilers, IA-64, 64-bit architecture
2	Motohiro Kawahito, Hideaki Komatsu, Toshio Nakatani	Effective Sign Extension Elimination.	PLDI	2002	DBLP DOI BibTeX RDF	sign extension, Java, JIT compilers, IA-64, 64-bit architectures
2	D. V. Poornaiah, P. V. Ananda Mohan	Design of a 3-bit Booth recoded novel VLSI concurrent multiplier-accumulator architecture.	VLSI Design	1995	DBLP DOI BibTeX RDF	concurrent multiplier-accumulator architecture, second order modified Booth algorithm, sign extension bits minimization algorithm, sign-bit updating algorithm, multi-bit recoded parallel multipliers, computation time reduction, CMOS standard cell technology, 35 ns, 50 pF, parallel algorithms, VLSI, VLSI, parallel architectures, digital arithmetic, multiplication, CMOS logic circuits, multiplying circuits, accumulation, 1 micron
1	Ruimin Huang, Chip-Hong Chang, Mathias Faust, Niklas Lotze, Yiannos Manoli	Sign-Extension Avoidance and Word-Length Optimization by Positive-Offset Representation for FIR Filter Design.	IEEE Trans. on Circuits and Systems	2011	DBLP DOI BibTeX RDF
1	Mohsen Saneei, Ali Afzali-Kusha, Zainalabedin Navabi	Sign Bit Reduction Encoding For Low Power Applications.	Signal Processing Systems	2009	DBLP DOI BibTeX RDF	Low power multiplier, Signed multiplier, Sign extension, FIR filter, Power reduction, Energy reduction, Bus encoding
1	Tor M. Aamodt, Paul Chow	Compile-time and instruction-set methods for improving floating- to fixed-point conversion accuracy.	ACM Trans. Embedded Comput. Syst.	2008	DBLP DOI BibTeX RDF	fractional multiplication, Compilation, digital signal processing, scaling, fixed-point, signal-to-noise ratio
1	Rizwan Mudassir, Mohab Anis, Javid Jaffari	Switching activity reduction in low power Booth multiplier.	ISCAS	2008	DBLP DOI BibTeX RDF
1	Li-Rong Wang, Yi-Wei Chiu, Chia-Lin Hu, Ming-Hsien Tu, Shyh-Jye Jou, Chung-Len Lee	A reconfigurable MAC architecture implemented with mixed-Vt standard cell library.	ISCAS	2008	DBLP DOI BibTeX RDF
1	Jiho Chu, Youngsun Han, Seon Wook Kim	A Dataflow Analysis for Mode Set Optimization in DSP Instruction Sets.	CIT	2007	DBLP DOI BibTeX RDF
1	Jun Yao, Jie Chen, Zhaojun Lin	High Performance Mac Unit Using Modified Sign Extension Algorithm and A New High-Speed Alu in Dsp-Core.	International Journal of Software Engineering and Knowledge Engineering	2005	DBLP DOI BibTeX RDF
1	Li-Hsun Chen, Oscal T.-C. Chen, Teng-Yi Wang, Yung-Cheng Ma	A multiplication-accumulation computation unit with optimized compressors and minimized switching activities.	ISCAS	2005	DBLP DOI BibTeX RDF
1	Steve Haga, Natasha Reeves, Rajeev Barua, Diana Marculescu	Dynamic Functional Unit Assignment for Low Power.	The Journal of Supercomputing	2005	DBLP DOI BibTeX RDF	bit patterns, functional unit assignment, low power, hamming distance, superscalar, dynamic power
1	Steve Haga, Natasha Reeves, Rajeev Barua, Diana Marculescu	Dynamic Functional Unit Assignment for Low Power.	DATE	2003	DBLP DOI BibTeX RDF
1	Oscal T.-C. Chen, R. R.-B. Sheen, S. Wang	A low-power adder operating on effective dynamic data ranges.	IEEE Trans. VLSI Syst.	2002	DBLP DOI BibTeX RDF
1	R. R.-B. Sheen, S. Wang, Oscal T.-C. Chen, Ruey-Liang Ma	Power consumption of a 2's complement adder minimized by effective dynamic data ranges.	ISCAS	1999	DBLP DOI BibTeX RDF
1	Christian Luetkemeyer	An Optimized Coefficient Update Processor for High-Throughput Adaptive Equalizers.	ASAP	1997	DBLP DOI BibTeX RDF
1	Gary William Grewal	A Global Mode Instruction Minimization Technique for Embedded DSPs.	Great Lakes Symposium on VLSI	1996	DBLP DOI BibTeX RDF