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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 3 occurrences of 3 keywords
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Results
Found 7 publication records. Showing 7 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Soumya Pandit, Chittaranjan A. Mandal, Amit Patra |
A Methodology for Generation of Performance Models for the Sizing of Analog High-Level Topologies.  |
VLSI Design  |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Sipra Mandal, Soumya Pandit |
Statistical Simulation and Modeling of Nano-scale CMOS VCO Using Artificial Neural Network. |
VLSI Design |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Soumya Pandit, Chittaranjan A. Mandal, Amit Patra |
An automated high-level topology generation procedure for continuous-time SigmaDelta modulator. |
Integration |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Soumya Pandit, Chittaranjan A. Mandal, Amit Patra |
Systematic Methodology for High-Level Performance Modeling of Analog Systems. |
VLSI Design |
2009 |
DBLP DOI BibTeX RDF |
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| 1 | Soumya Pandit, Sumit K. Bhattacharya, Chittaranjan A. Mandal, Amit Patra |
A Fast Exploration Procedure for Analog High-Level Specification Translation. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Soumya Pandit, Chittaranjan A. Mandal, Amit Patra |
A formal approach for high level synthesis of linear analog systems. |
ACM Great Lakes Symposium on VLSI |
2006 |
DBLP DOI BibTeX RDF |
L2 sensitivity, analog high level synthesis, linear systems, architecture exploration, state space model |
| 1 | Soumya Pandit, Sougata Kar, Chittaranjan A. Mandal, Amit Patra |
High level synthesis of higher order continuous time state variable filters with minimum sensitivity and hardware count. |
DATE |
2006 |
DBLP DOI BibTeX RDF |
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