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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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Results
Found 6 publication records. Showing 6 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Vibhu Sharma, Stefan Cosemans, Maryam Ashouei, Jos Huisken, Francky Catthoor, Wim Dehaene |
Ultra low power litho friendly local assist circuitry for variability resilient 8T SRAM.  |
DATE  |
2012 |
DBLP BibTeX RDF |
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| 1 | Vibhu Sharma, Stefan Cosemans, Maryam Ashouei, Jos Huisken, Francky Catthoor, Wim Dehaene |
A 4.4 pJ/Access 80 MHz, 128 kbit Variability Resilient SRAM With Multi-Sized Sense Amplifier Redundancy.  |
J. Solid-State Circuits  |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Bram Rooseleer, Stefan Cosemans, Wim Dehaene |
A 65 nm, 850 MHz, 256 kbit, 4.3 pJ/access, ultra low leakage power memory using dynamic cell stability and a dual swing data link.  |
ESSCIRC  |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Vibhu Sharma, Stefan Cosemans, Maryam Ashouei, Jos Huisken, Francky Catthoor, Wim Dehaene |
8T SRAM with Mimicked Negative Bit-lines and Charge Limited Sequential sense amplifier for wireless sensor nodes.  |
ESSCIRC  |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Anselme Vignon, Stefan Cosemans, Wim Dehaene |
A low leakage 500MHz 2T embedded dynamic memory with integrated semi-transparent refresh.  |
ESSCIRC  |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Anselme Vignon, Stefan Cosemans, Wim Dehaene, Pol Marchal, Marco Facchini |
A novel DRAM architecture as a low leakage alternative for SRAM caches in a 3D interconnect context.  |
DATE  |
2009 |
DBLP BibTeX RDF |
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Displaying result #1 - #6 of 6 (100 per page; Change: )
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