| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Dynamic test compaction for a random test generation procedure with input cube avoidance.   |
ASP-DAC  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Fan Yang, Sreejit Chakravarty, Narendra Devta-Prasanna, Sudhakar M. Reddy, Irith Pomeranz |
Detectability of internal bridging faults in scan chains. |
ASP-DAC |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Selection of a fault model for fault diagnosis based on unique responses. |
DATE |
2009 |
DBLP BibTeX RDF |
|
| 1 | Xun Tang, Ruifeng Guo, Wu-Tung Cheng, Sudhakar M. Reddy |
Improving compressed test pattern generation for multiple scan chain failure diagnosis. |
DATE |
2009 |
DBLP BibTeX RDF |
|
| 1 | Santiago Remersaro, Janusz Rajski, Sudhakar M. Reddy, Irith Pomeranz |
A scalable method for the generation of small test sets. |
DATE |
2009 |
DBLP BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Partitioned n-detection test generation. |
ACM Great Lakes Symposium on VLSI |
2009 |
DBLP DOI BibTeX RDF |
fault partitioning, test generation, stuck-at faults, bridging faults, n-detection test sets |
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Definition and application of approximate necessary assignments. |
ACM Great Lakes Symposium on VLSI |
2009 |
DBLP DOI BibTeX RDF |
necessary assignments, random test generation, test generation, stuck-at faults |
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
State persistence: a property for guiding test generation. |
ACM Great Lakes Symposium on VLSI |
2009 |
DBLP DOI BibTeX RDF |
broadside tests, test generation, transition faults, scan-based tests |
| 1 | Aftab Farooqi, Richard O. Gale, Sudhakar M. Reddy, Brian Nutter, Chris Monico |
Markov source based test length optimized SCAN-BIST architecture. |
ISQED |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Alejandro Czutro, Ilia Polian, Matthew D. T. Lewis, Piet Engelke, Sudhakar M. Reddy, Bernd Becker |
TIGUAN: Thread-Parallel Integrated Test Pattern Generator Utilizing Satisfiability ANalysis. |
VLSI Design |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
The Effect of Filling the Unspecified Values of a Test Set on the Test Set Quality. |
VLSI Design |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Double-Single Stuck-at Faults: A Delay Fault Model for Synchronous Sequential Circuits. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Functional Broadside Tests Under an Expanded Definition of Functional Operation Conditions. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | S. Saqib Khursheed, Bashir M. Al-Hashimi, Sudhakar M. Reddy, Peter Harrod |
Diagnosis of Multiple-Voltage Design With Bridge Defect. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Circuit lines for guiding the generation of random test sequences for synchronous sequential circuits. |
ASP-DAC |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Test vector chains for increased targeted and untargeted fault coverage. |
ASP-DAC |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Sudhakar M. Reddy, Irith Pomeranz, Chen Liu |
On tests to detect via opens in digital CMOS circuits. |
DAC |
2008 |
DBLP DOI BibTeX RDF |
constrained stuck-at tests, test generation, DFT, open defects |
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
A Same/Different Fault Dictionary: An Extended Pass/Fail Fault Dictionary with Improved Diagnostic Resolution. |
DATE |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
A Bridging Fault Model Where Undetectable Faults Imply Logic Redundancy. |
DATE |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Santiago Remersaro, Janusz Rajski, Thomas Rinderknecht, Sudhakar M. Reddy, Irith Pomeranz |
ATPG Heuristics Dependant Observation Point Insertion for Enhanced Compaction and Data Volume Reduction. |
DFT |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Fan Yang, Sreejit Chakravarty, Narendra Devta-Prasanna, Sudhakar M. Reddy, Irith Pomeranz |
Detection of Transistor Stuck-Open Faults in Asynchronous Inputs of Scan Cells. |
DFT |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Ilia Polian, Sudhakar M. Reddy, Irith Pomeranz, Xun Tang, Bernd Becker |
On Reducing Circuit Malfunctions Caused by Soft Errors. |
DFT |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Ilia Polian, Sudhakar M. Reddy, Bernd Becker |
Scalable Calculation of Logical Masking Effects for Selective Hardening Against Soft Errors. |
ISVLSI |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy, Sandip Kundu |
On Common-Mode Skewed-Load and Broadside Tests. |
VLSI Design |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Design-for-Testability for Improved Path Delay Fault Coverage of Critical Paths. |
VLSI Design |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Design-for-Testability for Synchronous Sequential Circuits that Maintains Functional Switching Activity. |
VLSI Design |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Synthesis for Broadside Testability of Transition Faults. |
VTS |
2008 |
DBLP DOI BibTeX RDF |
broadside tests, standard scan, transition faults, test synthesis, full-scan circuits |
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Expanded Definition of Functional Operation Conditions and its Effects on the Computation of Functional Broadside Tests. |
VTS |
2008 |
DBLP DOI BibTeX RDF |
functional broadside tests, test generation, transition faults, reachable states, full-scan circuits |
| 1 | Fan Yang, Sreejit Chakravarty, Narendra Devta-Prasanna, Sudhakar M. Reddy, Irith Pomeranz |
On the Detectability of Scan Chain Internal Faults — An Industrial Case Study. |
VTS |
2008 |
DBLP DOI BibTeX RDF |
Faults in scan cells, stuck-at and stuck-on faults |
| 1 | Kohei Miyase, Kenta Terashima, Xiaoqing Wen, Seiji Kajihara, Sudhakar M. Reddy |
On Detection of Bridge Defects with Stuck-at Tests. |
IEICE Transactions |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Hangkyu Lee, Irith Pomeranz, Sudhakar M. Reddy |
On Complete Functional Broadside Tests for Transition Faults. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Scan-Based Delay Test Types and Their Effect on Power Dissipation During Test. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Unspecified Transition Faults: A Transition Fault Model for At-Speed Fault Simulation and Test Generation. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Primary Input Vectors to Avoid in Random Test Sequences for Synchronous Sequential Circuits. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
On the Saturation of n-Detection Test Generation by Different Definitions With Increased n. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Transition Path Delay Faults: A New Path Delay Fault Model for Small and Large Delay Defects. |
IEEE Trans. VLSI Syst. |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Improving the Transition Fault Coverage of Functional Broadside Tests by Observation Point Insertion. |
IEEE Trans. VLSI Syst. |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhuo Zhang, Sudhakar M. Reddy, Irith Pomeranz |
Warning: Launch off Shift Tests for Delay Faults May Contribute to Test Escapes. |
ASP-DAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
On test generation by input cube avoidance. |
DATE |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
A-Diagnosis: A Complement to Z-Diagnosis. |
DFT |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Semi-Concurrent On-Line Testing of Transition Faults Through Output Response Comparison of Identical Circuits. |
DFT |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuan Cai, Sudhakar M. Reddy, Bashir M. Al-Hashimi |
Reducing the Energy Consumption in Fault-Tolerant Distributed Embedded Systems with Time-Constraint. |
ISQED |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Santiago Remersaro, Xijiang Lin, Sudhakar M. Reddy, Irith Pomeranz, Janusz Rajski |
Low Shift and Capture Power Scan Tests. |
VLSI Design |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Functional Broadside Tests with Different Levels of Reachability. |
VLSI Design |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Equivalence and Dominance Relations Between Fault Pairs and Their Use in Fault Pair Collapsing for Fault Diagnosis. |
VLSI Design |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Wei Zou, Wu-Tung Cheng, Sudhakar M. Reddy, Huaxing Tang |
Speeding Up Effect-Cause Defect Diagnosis Using a Small Dictionary. |
VTS |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Autoscan-Invert: An Improved Scan Design without External Scan Inputs or Outputs. |
VTS |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Diagnostic Test Generation Based on Subsets of Faults. |
European Test Symposium |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
The Accidental Detection Index as a Fault Ordering Heuristic for Full-Scan Circuits |
CoRR |
2007 |
DBLP BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Worst-Case and Average-Case Analysis of n-Detection Test Sets |
CoRR |
2007 |
DBLP BibTeX RDF |
|
| 1 | Santiago Remersaro, Xijiang Lin, Sudhakar M. Reddy, Irith Pomeranz, Janusz Rajski |
Scan-Based Tests with Low Switching Activity. |
IEEE Design & Test of Computers |
2007 |
DBLP DOI BibTeX RDF |
scan shift, test response capture, supply current, power dissipation, switching activity, scan-based test |
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
On the Use of Functional Test Generation in Diagnostic Test Generation for Synchronous Sequential Circuits. |
Electr. Notes Theor. Comput. Sci. |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy, Srikanth Venkataraman |
z-Diagnosis: A Framework for Diagnostic Fault Simulation and Test Generation Utilizing Subsets of Outputs. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Generation of Broadside Transition-Fault Test Sets That Detect Four-Way Bridging Faults. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Forming N-detection test sets without test generation. |
ACM Trans. Design Autom. Electr. Syst. |
2007 |
DBLP DOI BibTeX RDF |
test generation, stuck-at faults, Bridging faults, n-detection test sets |
| 1 | Yuan Cai, Marcus T. Schmitz, Bashir M. Al-Hashimi, Sudhakar M. Reddy |
Workload-ahead-driven online energy minimization techniques for battery-powered embedded systems with time-constraints. |
ACM Trans. Design Autom. Electr. Syst. |
2007 |
DBLP DOI BibTeX RDF |
adaptive body biasing, embedded systems, Dynamic voltage scaling, battery |
| 1 | Yuan Cai, Marcus T. Schmitz, Alireza Ejlali, Bashir M. Al-Hashimi, Sudhakar M. Reddy |
Cache size selection for performance, energy and reliability of time-constrained systems. |
ASP-DAC |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Gang Chen, Sudhakar M. Reddy, Irith Pomeranz, Janusz Rajski |
A test pattern ordering algorithm for diagnosis with truncated fail data. |
DAC |
2006 |
DBLP DOI BibTeX RDF |
test pattern ordering, truncated fail data, diagnosis |
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Generation of broadside transition fault test sets that detect four-way bridging faults. |
DATE |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Test compaction for transition faults under transparent-scan. |
DATE |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Narendra Devta-Prasanna, Arun Gunda, P. Krishnamurthy, Sudhakar M. Reddy, Irith Pomeranz |
Test Generation for Open Defects in CMOS Circuits. |
DFT |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Scan-Based Delay Fault Tests for Diagnosis of Transition Faults. |
DFT |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
A delay fault model for at-speed fault simulation and test generation. |
ICCAD |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Chaowen Yu, Sudhakar M. Reddy, Irith Pomeranz |
A Partitioning Technique for Identification of Error-Capturing Scan Cells in Scan-BIST. |
IOLTS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Gang Chen, Sudhakar M. Reddy, Irith Pomeranz, Janusz Rajski |
New Procedures to Identify Redundant Stuck-At Faults and Removal of Redundant Logic. |
VLSI Design |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
The Cut Delay Fault Model for Guiding the Generation of n-Detection Test Sets for Transition Faults. |
VLSI Design |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Wei Zou, Wu-Tung Cheng, Sudhakar M. Reddy, Huaxing Tang |
On Methods to Improve Location Based Logic Diagnosis. |
VLSI Design |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Hangkyu Lee, Irith Pomeranz, Sudhakar M. Reddy |
A Test Generation Procedure for Avoiding the Detection of Functionally Redundant Transition Faults. |
VTS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Bharath Seshadri, Irith Pomeranz, Srikanth Venkataraman, Enamul Amyeen, Sudhakar M. Reddy |
Dominance Based Analysis for Large Volume Production Fail Diagnosis. |
VTS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhuo Zhang, Sudhakar M. Reddy, Irith Pomeranz, Xijiang Lin, Janusz Rajski |
Scan Tests with Multiple Fault Activation Cycles for Delay Faults. |
VTS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Fault Collapsing for Transition Faults Using Extended Transition Faults. |
European Test Symposium |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhuo Zhang, Sudhakar M. Reddy, Irith Pomeranz, Janusz Rajski, Bashir M. Al-Hashimi |
Enhancing Delay Fault Coverage through Low Power Segmented Scan. |
European Test Symposium |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Narendra Devta-Prasanna, Arun Gunda, P. Krishnamurthy, Sudhakar M. Reddy, Irith Pomeranz |
A Unified Method to Detect Transistor Stuck-Open Faults and Transition Delay Faults. |
European Test Symposium |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
On Generating Tests that Avoid the Detection of Redundant Faults in Synchronous Sequential Circuits with Full Scan. |
IEEE Trans. Computers |
2006 |
DBLP DOI BibTeX RDF |
fault dominance, overtesting, Design-for-testability, test generation, synchronous sequential circuits, redundant faults, full-scan |
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Scan-BIST based on transition probabilities for circuits with single and multiple scan chains. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Transparent DFT: a design for testability and test generation approach for synchronous sequential circuits. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Generation of Functional Broadside Tests for Transition Faults. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Using Dummy Bridging Faults to Define Reduced Sets of Target Faults. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Improved n-Detection Test Sequences Under Transparent Scan. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Narendra Devta-Prasanna, Sudhakar M. Reddy, Arun Gunda, P. Krishnamurthy, Irith Pomeranz |
Improved Delay Fault Coverage Using Subsets of Flip-flops to Launch Transitions. |
Asian Test Symposium |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Kohei Miyase, Kenta Terashima, Seiji Kajihara, Xiaoqing Wen, Sudhakar M. Reddy |
On Improving Defect Coverage of Stuck-at Fault Tests. |
Asian Test Symposium |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Chaowen Yu, Sudhakar M. Reddy, Irith Pomeranz |
Circuit Independent Weighted Pseudo-Random BIST Pattern Generator. |
Asian Test Symposium |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Wei Zou, Wu-Tung Cheng, Sudhakar M. Reddy |
Bridge Defect Diagnosis with Physical Information. |
Asian Test Symposium |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Worst-Case and Average-Case Analysis of n-Detection Test Sets. |
DATE |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
The Accidental Detection Index as a Fault Ordering Heuristic for Full-Scan Circuits. |
DATE |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Huaxing Tang, Gang Chen, Sudhakar M. Reddy, Chen Wang, Janusz Rajski, Irith Pomeranz |
Defect Aware Test Patterns. |
DATE |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Recovery During Concurrent On-Line Testing of Identical Circuits. |
DFT |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhuo Zhang, Sudhakar M. Reddy, Irith Pomeranz |
On Generating Pseudo-Functional Delay Fault Tests for Scan Designs. |
DFT |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Narendra Devta-Prasanna, Arun Gunda, P. Krishnamurthy, Sudhakar M. Reddy, Irith Pomeranz |
A Novel Method of Improving Transition Delay Fault Coverage Using Multiple Scan Enable Signals. |
ICCD |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuan Cai, Sudhakar M. Reddy, Irith Pomeranz, Bashir M. Al-Hashimi |
Battery-aware dynamic voltage scaling in multiprocessor embedded system. |
ISCAS |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Dynamic Test Compaction for Bridging Faults. |
ISQED |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Wei Li, Sudhakar M. Reddy, Irith Pomeranz |
On Reducing Peak Current and Power during Test. |
ISVLSI |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Srikanth Venkataraman, Sudhakar M. Reddy |
Fault Diagnosis and Fault Model Aliasing. |
ISVLSI |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Wei Li, Seongmoon Wang, Srimat T. Chakradhar, Sudhakar M. Reddy |
Distance Restricted Scan Chain Reordering to Enhance Delay Fault Coverage. (PDF / PS) |
VLSI Design |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Tuple Detection for Path Delay Faults: A Method for Improving Test Set Quality. (PDF / PS) |
VLSI Design |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Huaxing Tang, Chen Wang, Janusz Rajski, Sudhakar M. Reddy, Jerzy Tyszer, Irith Pomeranz |
On Efficient X-Handling Using a Selective Compaction Scheme to Achieve High Test Response Compaction Ratios. (PDF / PS) |
VLSI Design |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Yonsang Cho, Irith Pomeranz, Sudhakar M. Reddy |
On reducing test application time for scan circuits using limited scan operations and transfer sequences. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
On masking of redundant faults in synchronous sequential circuits with design-for-testability logic. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
On fault equivalence, fault dominance, and incompletely specified test sets. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Janusz Rajski, Jerzy Tyszer, Chen Wang, Sudhakar M. Reddy |
Finite memory test response compactors for embedded test applications. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2005 |
DBLP DOI BibTeX RDF |
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