| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Naila Farooqui, Andrew Kerr, Greg Eisenhauer, Karsten Schwan, Sudhakar Yalamanchili |
Lynx: A dynamic instrumentation system for data-parallel applications on GPGPU architectures.  |
ISPASS  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Jeffrey S. Vetter, Richard Glassbrook, Jack Dongarra, Karsten Schwan, Bruce Loftis, Stephen McNally, Jeremy S. Meredith, James Rogers, Philip C. Roth, Kyle Spafford, Sudhakar Yalamanchili |
Keeneland: Bringing Heterogeneous GPU Computing to the Computational Science Community. |
Computing in Science and Engineering |
2011 |
DBLP DOI BibTeX RDF |
emerging architectures, GPU, High-performance computing, computational science, Graphics processor, heterogeneous processors |
| 1 | Subho Chatterjee, Mitchelle Rasquinha, Sudhakar Yalamanchili, Saibal Mukhopadhyay |
A Scalable Design Methodology for Energy Minimization of STTRAM: A Circuit and Architecture Perspective. |
IEEE Trans. VLSI Syst. |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Sudhakar Yalamanchili |
Interconnection Networks. |
Encyclopedia of Parallel Computing |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Sudhakar Yalamanchili |
Switching Techniques. |
Encyclopedia of Parallel Computing |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Syed Minhaj Hassan, Dhruv Choudhary, Mitchelle Rasquinha, Sudhakar Yalamanchili |
Regulating Locality vs. Parallelism Tradeoffs in Multiple Memory Controller Environments. |
PACT |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Naila Farooqui, Andrew Kerr, Gregory Frederick Diamos, Sudhakar Yalamanchili, Karsten Schwan |
A framework for dynamically instrumenting GPU compute applications within GPU Ocelot. |
GPGPU |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Gregory Frederick Diamos, Benjamin Ashbaugh, Subramaniam Maiyuran, Andrew Kerr, Haicheng Wu, Sudhakar Yalamanchili |
SIMD re-convergence at thread frontiers. |
MICRO |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Karsten Schwan, Ada Gavrilovska, Sudhakar Yalamanchili |
HyVM - Hybrid Virtual Machines - Efficient Use of Future Heterogeneous Chip Multiprocessors. |
ARCS |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Mitchelle Rasquinha, Dhruv Choudhary, Subho Chatterjee, Saibal Mukhopadhyay, Sudhakar Yalamanchili |
An energy efficient cache design using spin torque transfer (STT) RAM. |
ISLPED |
2010 |
DBLP DOI BibTeX RDF |
(STT)RAM, memory technologies, cache design |
| 1 | Gregory Frederick Diamos, Andrew Kerr, Sudhakar Yalamanchili, Nathan Clark |
Ocelot: a dynamic optimization framework for bulk-synchronous applications in heterogeneous systems. |
PACT |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Andrew Kerr, Gregory F. Diamos, Sudhakar Yalamanchili |
Modeling GPU-CPU workloads and systems. |
GPGPU |
2010 |
DBLP DOI BibTeX RDF |
Ocelot, PTX, Rodinia, parboil, GPGPU, CUDA, OpenCL |
| 1 | Gregory F. Diamos, Sudhakar Yalamanchili |
Speculative execution on multi-GPU systems. |
IPDPS |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Jeffrey Young, Sudhakar Yalamanchili |
Dynamic Partitioned Global Address Spaces for power efficient DRAM virtualization. |
Green Computing Conference |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Dean L. Lewis, Sudhakar Yalamanchili, Hsien-Hsin S. Lee |
High Performance Non-blocking Switch Design in 3D Die-Stacking Technology. |
ISVLSI |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Andrew Kerr, Gregory F. Diamos, Sudhakar Yalamanchili |
A characterization and analysis of PTX kernels. |
IISWC |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Subho Chatterjee, Mitchelle Rasquinha, Sudhakar Yalamanchili, Saibal Mukhopadhyay |
A methodology for robust, energy efficient design of Spin-Torque-Transfer RAM arrays at scaled technologies. |
ICCAD |
2009 |
DBLP BibTeX RDF |
|
| 1 | Gregory F. Diamos, Sudhakar Yalamanchili |
Harmony: an execution model and runtime for heterogeneous many core systems. |
HPDC |
2008 |
DBLP DOI BibTeX RDF |
scheduling, optimization, heterogeneous, gpgpu, performance monitoring, dependency graph, many core, runtime, harmony |
| 1 | Subramanian Ramaswamy, Sudhakar Yalamanchili |
An Utilization Driven Framework for Energy Efficient Caches. |
HiPC |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Kangtao Kendall Chuang, Sudhakar Yalamanchili, Ada Gavrilovska, Karsten Schwan |
ShareStreams-V: A Virtualized QoS Packet Scheduling Accelerator. |
FCCM |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Subramanian Ramaswamy, Sudhakar Yalamanchili |
Customized Placement for High Performance Embedded Processor Caches. |
ARCS |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Subramanian Ramaswamy, Sudhakar Yalamanchili |
Improving cache efficiency via resizing + remapping. |
ICCD |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Subramanian Ramaswamy, Jaswanth Sreeram, Sudhakar Yalamanchili, Krishna V. Palem |
Data trace cache: an application specific cache architecture. |
SIGARCH Computer Architecture News |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Blanca Caminero, Carmen Carrión, Francisco J. Quiles, José Duato, Sudhakar Yalamanchili |
MMR: A MultiMedia Router architecture to support hybrid workloads. |
J. Parallel Distrib. Comput. |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Subramanian Ramaswamy, Sudhakar Yalamanchili |
Customizable Fault Tolerant Caches for Embedded Processors. |
ICCD |
2006 |
DBLP BibTeX RDF |
|
| 1 | Blanca Caminero, Carmen Carrión, Francisco J. Quiles, José Duato, Sudhakar Yalamanchili |
Traffic Scheduling Solutions with QoS Support for an Input-Buffered MultiMedia Router. |
IEEE Trans. Parallel Distrib. Syst. |
2005 |
DBLP DOI BibTeX RDF |
link/switch scheduling, Quality of Service (QoS), LANs, switch architecture, cluster networks |
| 1 | Krishna V. Palem, Lakshmi N. Chakrapani, Sudhakar Yalamanchili |
A Framework for Compiler Driven Design Space Exploration for Embedded System Customization. |
ASIAN |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Raj Krishnamurthy, Sudhakar Yalamanchili, Karsten Schwan, Richard West |
ShareStreams: A Scalable Architecture and Hardware Support for High-Speed QoS Packet Schedulers. |
FCCM |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Raj Krishnamurthy, Sudhakar Yalamanchili, Karsten Schwan, Richard West |
Leveraging Block Decisions and Aggregation in the ShareStreams QoS Architecture. |
IPDPS |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Blanca Caminero, Carmen Carrión, Francisco J. Quiles, José Duato, Sudhakar Yalamanchili |
A Solution for Handling Hybrid Traffic in Clustered Environments: The MultiMedia Router MMR. |
IPDPS |
2003 |
DBLP DOI BibTeX RDF |
Clusters of Workstations (COWs), Quality of Service (QoS), multimedia communications, router architecture, switch scheduling |
| 1 | Blanca Caminero, Carmen Carrión, Francisco J. Quiles, José Duato, Sudhakar Yalamanchili |
A Hardware Approach to QoS Support in Cluster Environments: The Multimedia Router MMR. |
PDPTA |
2003 |
DBLP BibTeX RDF |
|
| 1 | Indrani Paul, Sudhakar Yalamanchili, José Duato |
Algorithms for Switch-Scheduling in the Multimedia Router for LANs. |
HiPC |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Sudhakar Yalamanchili |
The Customization Landscape for Embedded Systems. |
HiPC |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Blanca Caminero, Carmen Carrión, Francisco J. Quiles, José Duato, Sudhakar Yalamanchili |
A new switch scheduling algorithm to improve QoS in the multimedia router. |
IEEE Workshop on Multimedia Signal Processing |
2002 |
DBLP BibTeX RDF |
|
| 1 | Blanca Caminero, Carmen Carrión, Francisco J. Quiles, José Duato, Sudhakar Yalamanchili |
Investigating Switch Scheduling Algorithms to Support QoS in the Multimedia Router. (PDF / PS) |
IPDPS |
2002 |
DBLP DOI BibTeX RDF |
Quality of Service, multimedia communications, router architecture, switch scheduler |
| 1 | Craig Ulmer, Sudhakar Yalamanchili |
A Tunable Communications Library for Data Injection. |
PDPTA |
2002 |
DBLP BibTeX RDF |
|
| 1 | Blanca Caminero, Carmen Carrión, Francisco J. Quiles, José Duato, Sudhakar Yalamanchili |
A multimedia router architecture to provide high performance and QoS guarantees to mixed traffic. |
ICME |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Raj Krishnamurthy, Sudhakar Yalamanchili, Karsten Schwan, Richard West |
Architecture and Hardware for Scheduling Gigabit Packet Streams. |
Hot Interconnects |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Blanca Caminero, Carmen Carrión, Francisco J. Quiles, José Duato, Sudhakar Yalamanchili |
Tuning Buffer Size in the Multimedia Router (MMR). |
IPDPS |
2001 |
DBLP BibTeX RDF |
|
| 1 | Blanca Caminero, Carmen Carrión, Francisco J. Quiles, José Duato, Sudhakar Yalamanchili |
A Cost-Effective Hardware Link Scheduling Algorithm for the Multimedia Router (MMR). |
ICN |
2001 |
DBLP DOI BibTeX RDF |
Quality of Service, performance evaluation, multimedia communications, Communications switching |
| 1 | Young-Joo Suh, Binh Vien Dao, José Duato, Sudhakar Yalamanchili |
Software-Based Rerouting for Fault-Tolerant Pipelined Communication. |
IEEE Trans. Parallel Distrib. Syst. |
2000 |
DBLP DOI BibTeX RDF |
E-cube routing, livelock freedom, fault tolerance, interconnection networks, multiprocessors, adaptive routing, wormhole switching, oblivious routing, deadlock freedom, virtual cut-through switching |
| 1 | Young-Joo Suh, Sudhakar Yalamanchili |
Configurable Algorithms for Complete Exchange in 2D Meshes. |
IEEE Trans. Parallel Distrib. Syst. |
2000 |
DBLP DOI BibTeX RDF |
parallel algorithms, collective communication, Interprocessor communication, all-to-all communication, complete exchange, all-to-all personalized exchange |
| 1 | Damon S. Love, Sudhakar Yalamanchili, José Duato, Blanca Caminero, Francisco J. Quiles |
Switch Scheduling in the Multimedia Router (MMR). (PDF / PS) |
IPDPS |
2000 |
DBLP DOI BibTeX RDF |
Quality of Service (QoS), Multimedia traffic, Router architecture, Switch scheduling |
| 1 | Craig Ulmer, Sudhakar Yalamanchili |
An Extensible Message Layer for High-Performance Clusters. |
PDPTA |
2000 |
DBLP BibTeX RDF |
|
| 1 | Binh Vien Dao, José Duato, Sudhakar Yalamanchili |
Dynamically Configurable Message Flow Control for Fault-Tolerant Routing. |
IEEE Trans. Parallel Distrib. Syst. |
1999 |
DBLP DOI BibTeX RDF |
multiphase routing, pipelined interconnection network, message flow control, routing protocol, multicomputer, virtual channels, Fault-tolerant routing, wormhole switching |
| 1 | Tsai Chi Huang, Sudhakar Yalamanchili, Roy W. Melton, Philip R. Bingham, Cecil O. Alford |
Teaching Pipelining and Concurrency using Hardware Description Languages. |
MSE |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Blanca Caminero, Francisco J. Quiles, José Duato, Damon S. Love, Sudhakar Yalamanchili |
Performance Evaluation of the Multimedia Router with MPEG-2 Video Traffic. |
CANPC |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Richard West, Raj Krishnamurthy, W. K. Norton, Karsten Schwan, Sudhakar Yalamanchili, Marcel-Catalin Rosu, V. Sarat |
QUIC: A Quality of Service Network Interface Layer for Communication in NOWs. (PDF / PS) |
Heterogeneous Computing Workshop |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | José Duato, Sudhakar Yalamanchili, Blanca Caminero, Damon S. Love, Francisco J. Quiles |
MMR: A High-Performance Multimedia Router - Architecture and Design Trade-Offs. |
HPCA |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Young-Joo Suh, Sudhakar Yalamanchili |
All-To-All Communication with Minimum Start-Up Costs in 2D/3D Tori and Meshes. |
IEEE Trans. Parallel Distrib. Syst. |
1998 |
DBLP DOI BibTeX RDF |
parallel algorithms, collective communication, Interprocessor communication, all-to-all communication, all-to-all broadcast, complete exchange, all-to-all personalized exchange |
| 1 | Sudhakar Yalamanchili, José Duato (eds.) |
Parallel Computer Routing and Communication, Second International Workshop, PCRCW'97, Atlanta, Georgia, USA, June 26-27, 1997, Proceedings |
PCRCW |
1998 |
DBLP BibTeX RDF |
|
| 1 | Daniela Rosu, Karsten Schwan, Sudhakar Yalamanchili |
FARA - A Framework for Adaptive Resource Allocation in Complex Real-Time Systems. (PDF / PS) |
IEEE Real Time Technology and Applications Symposium |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | José Duato, Sudhakar Yalamanchili, Lionel M. Ni |
Interconnection networks - an engineering approach. |
|
1997 |
RDF |
|
| 1 | José Duato, Pedro López, Sudhakar Yalamanchili |
Deadlock- and Livelock-Free Routing Protocols for Wave Switching. (PDF / PS) |
IPPS |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Chirag S. Patel, Sek M. Chai, Sudhakar Yalamanchili, David E. Schimmel |
Power/Performance Trade-offs for Direct Networks. |
PCRCW |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniela Rosu, Karsten Schwan, Sudhakar Yalamanchili, Rakesh Jha |
On adaptive resource allocation for complex real-time application. (PDF / PS) |
IEEE Real-Time Systems Symposium |
1997 |
DBLP DOI BibTeX RDF |
complex real-time applications, high-performance real-time applications, limited resource availability, embedded system platforms, resource needs, over-sizing, worst-case application needs, time-critical applications, C31 systems, resource allocation, satisfiability, timing constraints, data-dependent, performance metrics, adaptive resource allocation |
| 1 | Binh Vien Dao, Sudhakar Yalamanchili, José Duato |
Architectural Support for Reducing Communication Overhead in Multiprocessor Interconnection Networks. |
HPCA |
1997 |
DBLP DOI BibTeX RDF |
routing, interconnection networks, message passing, communication locality |
| 1 | Chirag S. Patel, Sek M. Chai, Sudhakar Yalamanchili, David E. Schimmel |
Power Constrained Design of Multiprocessor Interconnection Networks. |
ICCD |
1997 |
DBLP BibTeX RDF |
|
| 1 | Sudhakar Yalamanchili, Todd Carpenter |
Paradigms for Modeling and Simulation of Multiprocessor Architectures. |
Int. Journal in Computer Simulation |
1996 |
DBLP BibTeX RDF |
|
| 1 | Patrick T. Gaughan, Binh Vien Dao, Sudhakar Yalamanchili, David E. Schimmel |
Distributed Deadlock-Free Routing in Faulty, Pipelined, Direct Interconnection Networks. |
IEEE Trans. Computers |
1996 |
DBLP DOI BibTeX RDF |
|
| 1 | Hari Lalgudi, Ian F. Akyildiz, Sudhakar Yalamanchili |
Augmented Binary Hypercube: A New Architecture for Processor Management. |
IEEE Trans. Computers |
1996 |
DBLP DOI BibTeX RDF |
Augmented binary hypercube, update algorithms, ideal mapping, resource management traffic |
| 1 | Young-Joo Suh, Sudhakar Yalamanchili |
Algorithms for All-to-All Personalized Exchange in 2D and 3D Tori. (PDF / PS) |
IPPS |
1996 |
DBLP DOI BibTeX RDF |
|
| 1 | José Duato, Pedro López, Federico Silla, Sudhakar Yalamanchili |
A High Performance Router Architecture for Interconnection Networks. |
ICPP, Vol. 1 |
1996 |
DBLP BibTeX RDF |
|
| 1 | Sudhakar Yalamanchili, Lynn E. Te Winkel, David L. Perschbacher, Belle Shenoy |
Partitioning and mapping in embedded multiprocessor architectures in the presence of constraints. |
Concurrency - Practice and Experience |
1995 |
DBLP DOI BibTeX RDF |
|
| 1 | Hatem Sellami, Sudhakar Yalamanchili |
Parallelism in Sequential Multiprocessor Simulation Models: A Case Study. |
ACM Trans. Model. Comput. Simul. |
1995 |
DBLP DOI BibTeX RDF |
partitioning and mapping, Petri nets, parallelism, parallel architectures, discrete event simulation, parallel simulation, marked graphs, conservative synchronization |
| 1 | Patrick T. Gaughan, Sudhakar Yalamanchili |
A Family of Fault-Tolerant Routing Protocols for Direct Multiprocessor Networks. |
IEEE Trans. Parallel Distrib. Syst. |
1995 |
DBLP DOI BibTeX RDF |
|
| 1 | Patrick T. Gaughan, Sudhakar Yalamanchili |
A Performance Model of Pipelined K-ary n-cubes. |
IEEE Trans. Computers |
1995 |
DBLP DOI BibTeX RDF |
|
| 1 | Binh Vien Dao, José Duato, Sudhakar Yalamanchili |
Configurable Flow Control Mechanisms for Fault-Tolerant Routing. |
ISCA |
1995 |
DBLP DOI BibTeX RDF |
|
| 1 | Hatem Sellami, Sudhakar Yalamanchili |
Time scale combining of conservative parallel discrete event simulations. (PDF / PS) |
IPPS |
1995 |
DBLP DOI BibTeX RDF |
time scale combining, inter-processor communication messages, distinct simulations, simulation trials, parallel processing, parallel architectures, discrete event simulation, discrete event simulations, parallel discrete event simulations |
| 1 | Young-Joo Suh, Binh Vien Dao, José Duato, Sudhakar Yalamanchili |
Software Based Fault-Tolerant Oblivious Routing in Pipelined Networks. |
ICPP |
1995 |
DBLP BibTeX RDF |
|
| 1 | Christopher H. de Castro, Sudhakar Yalamanchili |
Partitioning Coarse-Grain Signal Flow Graphs for Heterogeneous DSP Architectures. |
Int. Journal in Computer Simulation |
1994 |
DBLP BibTeX RDF |
|
| 1 | Eileen Tien Lin, Edward Omiecinski, Sudhakar Yalamanchili |
Large Join Optimization on a Hypercube Multiprocessor. |
IEEE Trans. Knowl. Data Eng. |
1994 |
DBLP DOI BibTeX RDF |
large join optimization, parallel large join plan, initial solution, iterative local-improvement method, Intel iPSC/2 hypercube machine, performance, computational complexity, parallel programming, query processing, relational database, heuristics, simulated annealing, optimisation, iterative methods, hypercube networks, relational algebra, heuristic programming, NP-hard problem, hypercube multiprocessor, problem complexity, inherent parallelism, large join queries |
| 1 | James D. Allen, Patrick T. Gaughan, David E. Schimmel, Sudhakar Yalamanchili |
Ariadne - An Adaptive Router for Fault-Tolerant Multicomputers. |
ISCA |
1994 |
DBLP DOI BibTeX RDF |
|
| 1 | José Duato, V. B. Dao, Patrick T. Gaughan, Sudhakar Yalamanchili |
Scouting: Fully Adaptive, Deadlock-Free Routing in Faulty Pipelined Networks. |
ICPADS |
1994 |
DBLP BibTeX RDF |
|
| 1 | Hatem Sellami, James D. Allen, David E. Schimmel, Sudhakar Yalamanchili |
Simulation of Marked Graphs on SIMD Architectures Using Efficient Memory Management. |
MASCOTS |
1994 |
DBLP BibTeX RDF |
|
| 1 | Patrick T. Gaughan, Sudhakar Yalamanchili |
Adaptive Routing Protocols for Hypercube Interconnection Networks. |
IEEE Computer |
1993 |
DBLP DOI BibTeX RDF |
|
| 1 | Patrick T. Gaughan, Sudhakar Yalamanchili |
Analytical Models of Bandwidth Allocation in Pipelined k-ary n-cubes. |
IPPS |
1993 |
DBLP BibTeX RDF |
|
| 1 | Hatem Sellami, Sudhakar Yalamanchili |
Partitioning and Mapping a Class of Parallel Multiprocessor Simulation Models. |
SPDP |
1993 |
DBLP BibTeX RDF |
|
| 1 | Sudhakar Yalamanchili, Lynn E. Te Winkel, David L. Perschbacher, Belle Shenoy |
Genie: An Environment for Partitioning and Mapping in Embedded Multiprocessors. |
SPDP |
1993 |
DBLP BibTeX RDF |
|
| 1 | Ajay Mohindra, Sudhakar Yalamanchili |
Dominant Representations: A Paradigm for Mapping Parallel Computations. |
IPPS |
1992 |
DBLP BibTeX RDF |
|
| 1 | Eileen Tien Lin, Edward Omiecinski, Sudhakar Yalamanchili |
Parallel Optimization and Execution of Large Join Queries. |
FGCS |
1992 |
DBLP BibTeX RDF |
|
| 1 | Patrick T. Gaughan, Sudhakar Yalamanchili |
Pipelined Circuit-Switching: A Fault-Tolerant Variant of Wormhole Routing. |
SPDP |
1992 |
DBLP BibTeX RDF |
|
| 1 | Steven D. Young, Sudhakar Yalamanchili |
Adaptive routing in generalized hypercube architectures. |
SPDP |
1991 |
DBLP DOI BibTeX RDF |
|
| 1 | Sudhakar Yalamanchili, Jake K. Aggarwal |
A Characterization and Analysis of Parallel Processor Interconnection Networks. |
IEEE Trans. Computers |
1987 |
DBLP DOI BibTeX RDF |
single-stage networks, Combinatorial power, near neighbor meshes, interconnection networks, permutations, ring networks, multistage networks, permutation groups |
| 1 | S. Y. Lee, Sudhakar Yalamanchili, Jake K. Aggarwal |
Parallel image normalization on a mesh connected array processor. |
Pattern Recognition |
1987 |
DBLP DOI BibTeX RDF |
|
| 1 | Sudhakar Yalamanchili, Jake K. Aggarwal |
Reconfiguration Strategies for Parallel Architectures. |
IEEE Computer |
1985 |
DBLP DOI BibTeX RDF |
|
| 1 | Sudhakar Yalamanchili, Jake K. Aggarwal |
Analysis of a model for parallel image processing. |
Pattern Recognition |
1985 |
DBLP DOI BibTeX RDF |
|
| 1 | Sudhakar Yalamanchili, Jake K. Aggarwal |
A system organization for parallel image processing. |
Pattern Recognition |
1985 |
DBLP DOI BibTeX RDF |
|
| 1 | Sudhakar Yalamanchili, Miroslaw Malek, Jake K. Aggarwal |
Workstations in a Local Area Network Environment. |
IEEE Computer |
1984 |
DBLP DOI BibTeX RDF |
|
| 1 | Sudhakar Yalamanchili, Jake K. Aggarwal |
Algebraic Properties of some Parallel Processor Interconnection Networks. |
ICDE |
1984 |
DBLP BibTeX RDF |
|
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