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Publications of "Sylvain Clerc" ( http://dblp.L3S.de/Authors/Sylvain_Clerc )

  Author page on DBLP  Author page in RDF  Community of Sylvain Clerc in ASPL-2

Publication years (Num. hits)
2009 (1) 2011 (2)
Publication types (Num. hits)
article(1) inproceedings(2)
Venues (Conferences, Journals, ...)
ACM Trans. Design Autom. Elect...(1) ICECS(1) ISLPED(1)
Authors
Fady Abouzeid(3) Sylvain Clerc(3) Fabian Firmin(2) Gilles Sicard(2) Marc Renaudin(2) Abhay Kumar(1) Fabrice Argoud(1) Philippe Roche(1) Rajesh Kumar(1) Tiempo Sas(1)
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Found 3 publication records. Showing 3 according to the selection in the facets
Hits ?▲ Authors Title Venue Year Link Author keywords
1Fady Abouzeid, Sylvain Clerc, Fabian Firmin, Marc Renaudin, Tiempo Sas, Gilles Sicard 40nm CMOS 0.35V-Optimized Standard Cell Libraries for Ultra-Low Power Applications. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Sylvain Clerc, Fady Abouzeid, Fabrice Argoud, Abhay Kumar, Rajesh Kumar, Philippe Roche A 240mV 1MHz, 340mV 10MHz, 40nm CMOS, 252 bits frame decoder using ultra-low voltage circuit design platform. Search on Bibsonomy ICECS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Fady Abouzeid, Sylvain Clerc, Fabian Firmin, Marc Renaudin, Gilles Sicard A 45nm CMOS 0.35v-optimized standard cell library for ultra-low power applications. Search on Bibsonomy ISLPED The full citation details ... 2009 DBLP  DOI  BibTeX  RDF bose choudhury hocquenghem, design, low power, methodology, logic, energy, cmos, library, circuit, subthreshold, ultra low voltage
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