| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Omer Khan, Sandip Kundu |
Microvisor: A Runtime Architecture for Thermal Management in Chip Multiprocessors.  |
T. HiPEAC  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Arnaldo Azevedo, Ben H. H. Juurlink, Cor Meenderinck, Andrei Terechko, Jan Hoogerbrugge, Mauricio Alvarez, Alex Ramírez, Mateo Valero |
A Highly Scalable Parallel Implementation of H.264. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Markus Rullmann, Renate Merker |
A Cost Model for Partial Dynamic Reconfiguration. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Isao Kotera, Kenta Abe, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi |
Power-Aware Dynamic Cache Partitioning for CMPs. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | William G. Osborne, Wayne Luk, José Gabriel F. Coutinho, O. Mencer |
Energy Reduction by Systematic Run-Time Reconfigurable Hardware Deactivation. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Matthias A. Blumrich, Valentina Salapura, Alan Gara |
Exploring the Architecture of a Stream Register-Based Snoop Filter. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | William Plishker, Nimish Sane, Mary Kiemb, Shuvra S. Bhattacharyya |
Heterogeneous Design in Functional DIF. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohammad Ansari, Mikel Luján, Christos Kotselidis, Kim Jarvis, Chris C. Kirkham, Ian Watson |
Robust Adaptation to Available Parallelism in Transactional Memory Applications. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Sandro Bartolini, Pierfrancesco Foglia, Cosimo Antonio Prete |
Eighth MEDEA Workshop. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Nan Wu 0003, Qianming Yang, Mei Wen, Yi He, Ju Ren, Maolin Guan, Chunyuan Zhang |
Tiled Multi-Core Stream Architecture. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Michael B. Henry, Leyla Nazhandali |
Hybrid Super/Subthreshold Design of a Low Power Scalable-Throughput FFT Architecture. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Fernando Latorre, Grigorios Magklis, José González, Pedro Chaparro, Antonio González |
CROB: Implementing a Large Instruction Window through Compression. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Timothy M. Jones, Michael F. P. O'Boyle, Jaume Abella, Antonio González |
Compiler Directed Issue Queue Energy Reduction. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Per Stenström (eds.) |
Transactions on High-Performance Embedded Architectures and Compilers III |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohammad Ansari, Mikel Luján, Christos Kotselidis, Kim Jarvis, Chris C. Kirkham, Ian Watson |
Transaction Reordering to Reduce Aborts in Software Transactional Memory. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Maziar Goudarzi, Tohru Ishihara, Hamid Noori |
Software-Level Instruction-Cache Leakage Reduction Using Value-Dependence of SRAM Leakage in Nanometer Technologies. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Tarik Saidani, Lionel Lacassagne, Joel Falcou, Claude Tadonki, Samir Bouaziz |
Parallelization Schemes for Memory Optimization on the Cell Processor: A Case Study on the Harris Corner Detector. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Per Stenström (eds.) |
Transactions on High-Performance Embedded Architectures and Compilers IV |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Jan Hoogerbrugge, Andrei Terechko |
A Multithreaded Multicore System for Embedded Media Processing. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Harald Devos, Jan Van Campenhout, Ingrid Verbauwhede, Dirk Stroobandt |
Constructing Application-Specific Memory Hierarchies on FPGAs. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Sai Prashanth Muralidhara, Mahmut T. Kandemir |
Communication Based Proactive Link Power Management. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Chun-Chieh Lin, Chuen-Liang Chen |
Cache Sensitive Code Arrangement for Virtual Machine. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Adam Welc, Bratin Saha |
Software Transactional Memory Validation - Time and Space Considerations. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Magnus Jahre, Lasse Natvig |
A High Performance Adaptive Miss Handling Architecture for Chip Multiprocessors. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Yasutaka Wada, Akihiro Hayashi, Takeshi Masuura, Jun Shirako, Hirofumi Nakano, Hiroaki Shikano, Keiji Kimura, Hironori Kasahara |
A Parallelizing Compiler Cooperative Heterogeneous Multicore Processor Architecture. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Yiannakis Sazeides, Andreas Moustakas, Kypros Constantinides, Marios Kleanthous |
Improving Branch Prediction by Considering Affectors and Affectees Correlations. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniel Llorente, Kimon Karras, Thomas Wild, Andreas Herkersdorf |
Advanced Packet Segmentation and Buffering Algorithms in Network Processors. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Valeriu Beiu, Basheer A. M. Madappuram, Peter M. Kelly, Liam McDaid |
On Two-Layer Brain-Inspired Hierarchical Topologies - A Rent's Rule Approach -. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Miquel Moretó, Francisco J. Cazorla, Alex Ramírez, Mateo Valero |
Dynamic Cache Partitioning Based on the MLP of Cache Misses. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | M. M. Waliullah |
Efficient Partial Roll-Backing Mechanism for Transactional Memory Systems. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Ben Cope, Peter Y. K. Cheung, Wayne Luk, Lee W. Howes |
A Systematic Design Space Exploration Approach to Customising Multi-Processor Architectures: Exemplified Using Graphics Processors. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Stanley Jaddoe, Mark Thompson, Andy D. Pimentel |
Signature-Based Calibration of Analytical Performance Models for System-Level Design Space Exploration. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Tobias Klug, Michael Ott, Josef Weidendorfer, Carsten Trinitis |
autopin - Automated Optimization of Thread-to-Core Pinning on Multicore Systems. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Frederik Vandeputte, Lieven Eeckhout |
Finding Extreme Behaviors in Microprocessor Workloads. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Nan Yuan, Lei Yu, Dongrui Fan |
An Efficient and Flexible Task Management for Many Cores. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Subhradyuti Sarkar, Dean M. Tullsen |
Data Layout for Cache Performance on a Multithreaded Architecture. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Frederik Vandeputte, Lieven Eeckhout |
Characterizing Time-Varying Program Behavior Using Phase Complexity Surfaces. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Xiongfei Liao, Wu Jigang, Thambipillai Srikanthan |
A Modular Simulator Framework for Network-on-Chip Based Manycore Chips Using UNISIM. |
T. HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Christine Rochange, Pascal Sainrat |
A Context-Parameterized Model for Static Analysis of Execution Times. |
T. HiPEAC |
2009 |
DBLP DOI BibTeX RDF |
timing analysis, Worst-Case Execution Time |
| 1 | Vijay Nagarajan, Rajiv Gupta, Arvind Krishnaswamy |
Compiler-Assisted Memory Encryption for Embedded Processors. |
T. HiPEAC |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Woojin Choi, Seok-Jun Park, Michel Dubois |
Accurate Instruction Pre-scheduling in Dynamically Scheduled Processors. |
T. HiPEAC |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Per Stenström, David B. Whalley |
Introduction. |
T. HiPEAC |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Simon Kluyskens, Lieven Eeckhout |
Branch Predictor Warmup for Sampled Simulation through Branch History Matching. |
T. HiPEAC |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Arquimedes Canedo, Ben A. Abderazek, Masahiro Sowa |
Compiler Support for Code Size Reduction Using a Queue-Based Processor. |
T. HiPEAC |
2009 |
DBLP DOI BibTeX RDF |
Reduced bit-width Instruction Set, Queue Computation Model, Code Generation, Code Size Reduction |
| 1 | Patrick Mahoney, Yvon Savaria, Guy Bois, Patrice Plante |
Performance Characterization for the Implementation of Content Addressable Memories Based on Parallel Hashing Memories. |
T. HiPEAC |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Chunling Hu, Daniel A. Jiménez, Ulrich Kremer |
Combining Edge Vector and Event Counter for Time-Dependent Power Behavior Characterization. |
T. HiPEAC |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Dominique Chanet, Javier Cabezas, Enric Morancho, Nacho Navarro, Koen De Bosschere |
Linux Kernel Compaction through Cold Code Swapping. |
T. HiPEAC |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Khaled Z. Ibrahim, Smaïl Niar |
Power-Aware Bus Coscheduling for Periodic Realtime Applications Running on Multiprocessor SoC. |
T. HiPEAC |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Georgios Keramidas, Polychronis Xekalakis, Stefanos Kaxiras |
Recruiting Decay for Dynamic Power Reduction in Set-Associative Caches. |
T. HiPEAC |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Amit Golander, Shlomo Weiss |
Reexecution and Selective Reuse in Checkpoint Processors. |
T. HiPEAC |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Per Stenström (eds.) |
Transactions on High-Performance Embedded Architectures and Compilers II |
T. HiPEAC |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Minwook Ahn, Yunheung Paek |
Fast Code Generation for Embedded Processors with Aliased Heterogeneous Registers. |
T. HiPEAC |
2009 |
DBLP DOI BibTeX RDF |
heterogeneous register architecture, register aliasing, compiler, code generation, register allocation, register coalescing |
| 1 | Aneesh Aggarwal |
Complexity Effective Bypass Networks. |
T. HiPEAC |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Hans Vandierendonck, André Seznec |
Fetch Gating Control through Speculative Instruction Window Weighting. |
T. HiPEAC |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Major Bhadauria, Sally A. McKee, Karan Singh, Gary S. Tyson |
Data Cache Techniques to Save Power and Deliver High Performance in Embedded Systems. |
T. HiPEAC |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Harald Devos, Kristof Beyls, Mark Christiaens, Jan M. Van Campenhout, Erik H. D'Hollander, Dirk Stroobandt |
Finding and Applying Loop Transformations for Generating Optimized FPGA Implementations. |
T. HiPEAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Per Stenström |
Introduction to Part 1. |
T. HiPEAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Seung Woo Son, Mahmut T. Kandemir |
A Prefetching Algorithm for Multi-speed Disks. |
T. HiPEAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Ke Ning, David R. Kaeli |
Power Aware External Bus Arbitration for System-on-a-Chip Embedded Systems. |
T. HiPEAC |
2007 |
DBLP DOI BibTeX RDF |
embedded systems, power-aware, external memory, media processor, bus arbitration |
| 1 | Iyad Al Khatib, Davide Bertozzi, Francesco Poletti, Luca Benini, Axel Jantsch, Mohamed Bechara, Hasan Khalifeh, Mazen Hajjar, Rustam Nabiev, Sven Jonsson |
Hardware/Software Architecture for Real-Time ECG Monitoring and Analysis Leveraging MPSoC Technology. |
T. HiPEAC |
2007 |
DBLP DOI BibTeX RDF |
HW/SW, hardware space exploration, embedded system design, Multiprocessor System-on-Chip, real-time analysis, electrocardiogram algorithms |
| 1 | Alex E. Susu, Michele Magno, Andrea Acquaviva, David Atienza, Giovanni De Micheli |
Reconfiguration Strategies for Environmentally Powered Devices: Theoretical Analysis and Experimental Validation. |
T. HiPEAC |
2007 |
DBLP DOI BibTeX RDF |
FPGA, Markov chains, energy harvesting, probabilistic model checking, Wireless Sensor Nodes |
| 1 | Shlomit S. Pinter, Israel Waldman |
Selective Code Compression Scheme for Embedded Systems. |
T. HiPEAC |
2007 |
DBLP DOI BibTeX RDF |
run-time decompression, Code compression, code size reduction |
| 1 | Koen De Bosschere, Wayne Luk, Xavier Martorell, Nacho Navarro, Michael F. P. O'Boyle, Dionisios N. Pnevmatikatos, Alex Ramírez, Pascal Sainrat, André Seznec, Per Stenström, Olivier Temam |
High-Performance Embedded Architecture and Compilation Roadmap. |
T. HiPEAC |
2007 |
DBLP DOI BibTeX RDF |
HiPEAC, single core architecture, programming models and tools, simulation and system modelling, real-time systems, compilation, interconnection networks, benchmarking, reconfigurable computing, run-time systems, multi-core architecture, roadmap |
| 1 | Weidong Shi, Chenghuai Lu, Hsien-Hsin S. Lee |
Memory-Centric Security Architecture. |
T. HiPEAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Maurice V. Wilkes |
High Performance Processor Chips. |
T. HiPEAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Michael F. P. O'Boyle, François Bodin, Marcelo Cintra |
Introduction to Part 2. |
T. HiPEAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Sally A. McKee |
Introduction to Part 3. |
T. HiPEAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Guilin Chen, Mahmut T. Kandemir |
An Approach for Enhancing Inter-processor Data Locality on Chip Multiprocessors. |
T. HiPEAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Per Stenström, Michael F. P. O'Boyle, François Bodin, Marcelo Cintra, Sally A. McKee (eds.) |
Transactions on High-Performance Embedded Architectures and Compilers I |
T. HiPEAC |
2007 |
DBLP BibTeX RDF |
|
| 1 | Shane Ryoo, Sain-Zee Ueng, Christopher I. Rodrigues, Robert E. Kidd, Matthew I. Frank, Wen-mei W. Hwu |
Automatic Discovery of Coarse-Grained Parallelism in Media Applications. |
T. HiPEAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Nicholas Nethercote, Doug Burger, Kathryn S. McKinley |
Convergent Compilation Applied to Loop Unrolling. |
T. HiPEAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Anca Mariana Molnos, Sorin Dan Cotofana, Marc J. M. Heijligers, Jos T. J. van Eijndhoven |
Static Cache Partitioning Robustness Analysis for Embedded On-Chip Multi-processors. |
T. HiPEAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Ghaffari Fakhreddine, Michel Auguin, Mohamed Abid, Maher Ben Jemaa |
Dynamic and On-Line Design Space Exploration for Reconfigurable Architectures. |
T. HiPEAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Michael J. Geiger, Sally A. McKee, Gary S. Tyson |
Specializing Cache Structures for High Performance and Energy Conservation in Embedded Systems. |
T. HiPEAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Dries Buytaert, Kris Venstermans, Lieven Eeckhout, Koen De Bosschere |
GCH: Hints for Triggering Garbage Collections. |
T. HiPEAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Grigori Fursin, Albert Cohen, Michael F. P. O'Boyle, Olivier Temam |
Quick and Practical Run-Time Evaluation of Multiple Program Optimizations. |
T. HiPEAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | John Oliver, Diana Franklin, Frederic T. Chong, Venkatesh Akella |
Using Application Bisection Bandwidth to Guide Tile Size Selection for the Synchroscalar Tile-Based Architecture. |
T. HiPEAC |
2007 |
DBLP DOI BibTeX RDF |
|
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