Search results for "TILE64"

Found 7 publication records. Showing 7 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
2	Xuan-Yi Lin, Kuan-Chou Lai, Shau-Yin Tseng, Kuan-Ching Li, Yeh-Ching Chung	An Efficient Programming Paradigm for Shared-Memory Master-Worker Video Decoding on TILE64 Many-Core Platform.	ICPP	2011	DBLP DOI BibTeX RDF	producer-consumer, TILE64, shared memory, programming paradigm, many-core, master-worker
1	Chenggang Yan, Feng Dai, Yongdong Zhang, Yike Ma, Licheng Chen, Lingjun Fan, Yasong Zheng	Parallel deblocking filter for H.264/AVC implemented on Tile64 platform.	ICME	2011	DBLP DOI BibTeX RDF
1	Xuan-Yi Lin, Chung-Yu Huang, Pei-Man Yang, Tai-Wen Lung, Shau-Yin Tseng, Yeh-Ching Chung	Parallelization of Motion JPEG Decoder on TILE64 Many-Core Platform.	MTPP	2010	DBLP DOI BibTeX RDF
1	Yoshi Shih-Chieh Huang, Kaven Chun-Kai Chou, Chung-Ta King, Shau-Yin Tseng	NTPT: on the end-to-end traffic prediction in the on-chip networks.	DAC	2010	DBLP DOI BibTeX RDF	end-to-end traffic prediction, network-on-chip, many-core
1	Jungwoo Ha, Stephen P. Crago	Opportunities for concurrent dynamic analysis with explicit inter-core communication.	PASTE	2010	DBLP DOI BibTeX RDF	inter-core communication, concurrency, dynamic analysis, instrumentation
1	William Lundgren	Gedae's automated management of hierarchical memories on multicore processors Commercial Tutorial.	IPDPS	2008	DBLP DOI BibTeX RDF
1	David Wentzlaff, Patrick Griffin, Henry Hoffmann, Liewei Bao, Bruce Edwards, Carl Ramey, Matthew Mattina, Chyi-Chang Miao, John F. Brown III, Anant Agarwal	On-Chip Interconnection Architecture of the Tile Processor.	IEEE Micro	2007	DBLP DOI BibTeX RDF	MIMD processors, parallel architectures, mesh networks, multicore architectures, on-chip interconnection networks

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