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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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Results
Found 4 publication records. Showing 4 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Lei Zhao, Daisuke Ikebuchi, Yoshiki Saito, M. Kamata, Naomi Seki, Yu Kojima, Hideharu Amano, Satoshi Koyama, Tatsunori Hashida, Y. Umahashi, D. Masuda, Kimiyoshi Usami, Keiji Kimura, Mitaro Namiki, Seidai Takeda, Hiroshi Nakamura, Masaaki Kondo |
Geyser-2: The second prototype CPU with fine-grained run-time power gating.  |
ASP-DAC  |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Kimiyoshi Usami, Tatsunori Hashida, Satoshi Koyama, Tatsuya Yamamoto, Daisuke Ikebuchi, Hideharu Amano, Mitaro Namiki, Masaaki Kondo, Hiroshi Nakamura |
Adaptive power gating for function units in a microprocessor. |
ISQED |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Daisuke Ikebuchi, Naomi Seki, Yu Kojima, M. Kamata, Lei Zhao, Hideharu Amano, Toshiaki Shirai, Satoshi Koyama, Tatsunori Hashida, Y. Umahashi, Hiroki Masuda, Kimiyoshi Usami, Seidai Takeda, Hiroshi Nakamura, Mitaro Namiki, Masaaki Kondo |
Geyser-1: a MIPS R3000 CPU core with fine-grained run-time power gating. |
ASP-DAC |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Kimiyoshi Usami, Toshiaki Shirai, Tatsunori Hashida, Hiroki Masuda, Seidai Takeda, Mitsutaka Nakata, Naomi Seki, Hideharu Amano, Mitaro Namiki, Masashi Imai, Masaaki Kondo, Hiroshi Nakamura |
Design and Implementation of Fine-Grain Power Gating with Ground Bounce Suppression. |
VLSI Design |
2009 |
DBLP DOI BibTeX RDF |
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